ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 72

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

Alternate Functions of Port B
72
ATmega64(L)
Table 29. Overriding Signals for Alternate Functions in PA3..PA0
Note:
The Port B pins with alternate functions are shown in Table 30.
Table 30. Port B Pins Alternate Functions
Note:
The alternate pin configuration is as follows:
• OC2/OC1C, Bit 7
OC2, Output Compare Match output: The PB7 pin can serve as an external output for
the Timer/Counter2 Output Compare. The pin has to be configured as an output (DDB7
set (one)) to serve this function. The OC2 pin is also the output pin for the PWM mode
timer function.
OC1C, Output Compare Match C output: The PB7 pin can serve as an external output
for the Timer/Counter1 Output Compare C. The pin has to be configured as an output
(DDB7 set (one)) to serve this function. The OC1C pin is also the output pin for the
PWM mode timer function.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
1. ADA is short for ADdress Active and represents the time when address is output. See
1. OC1C not applicable in ATmega103 compatibility mode.
“External Memory Interface” on page 25 for details.
Alternate Functions
OC2/OC1C
Compare and PWM Output C for Timer/Counter1)
OC1B (Output Compare and PWM Output B for Timer/Counter1)
OC1A (Output Compare and PWM Output A for Timer/Counter1)
OC0 (Output Compare and PWM Output for Timer/Counter0)
MISO (SPI Bus Master Input/Slave Output)
MOSI (SPI Bus Master Output/Slave Input)
SCK (SPI Bus Serial Clock)
SS (SPI Slave Select input)
PORTA3 • PUD
OUTPUT • WR
~(WR | ADA) •
A3 • ADA | D3
PA3/AD3
D3 INPUT
WR | ADA
SRE
SRE
SRE
0
0
–
(1)
(Output Compare and PWM Output for Timer/Counter2 or Output
PORTA2 • PUD
OUTPUT • WR
~(WR | ADA) •
A2• ADA | D2
PA2/AD2
WR | ADA
D2 INPUT
SRE
SRE
SRE
0
0
–
PORTA1 • PUD
OUTPUT • WR
~(WR | ADA) •
A1 • ADA | D1
PA1/AD1
WR | ADA
D1 INPUT
SRE
SRE
SRE
0
0
–
(1)
PORTA0 • PUD
OUTPUT • WR
~(WR | ADA) •
A0 • ADA | D0
PA0/AD0
2490G–AVR–03/04
D0 INPUT
WR | ADA
SRE
SRE
SRE
0
0
–