ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 157

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ATMEga64L

Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Timer/Counter Register –
TCNT2
2490G–AVR–03/04
Table 67. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 68. Clock Select Bit Description
If external pin modes are used for the Timer/Counter2, transitions on the T2 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT2) while
the counter is running, introduces a risk of missing a Compare Match between TCNT2
and the OCR2 Register.
Bit
Read/Write
Initial Value
COM21
CS22
0
0
0
0
1
1
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
COM20
CS21
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 152 for more details.
0
0
1
1
0
0
1
1
0
1
0
1
R/W
7
0
CS20
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare
Match when downcounting.
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare
Match when downcounting.
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/counter stopped).
clk
clk
clk
clk
clk
External clock source on T2 pin. Clock on falling edge.
External clock source on T2 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R/W
5
0
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
4
0
TCNT2[7:0]
R/W
3
0
R/W
2
0
ATmega64(L)
(1)
R/W
1
0
R/W
0
0
TCNT2
157

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