ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 190
ATMEga64L
Manufacturer Part Number
ATMEga64L
Description
8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA64L.pdf
(363 pages)
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ATmega64(L)
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 79. USBS Bit Settings
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(Character Size) in a frame the Receiver and Transmitter use.
Table 80. UCSZ Bits Settings
• Bit 0 – UCPOL: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when asynchronous
mode is used. The UCPOL bit sets the relationship between data output change and
data input sample, and the synchronous clock (XCK).
Table 81. UCPOL Bit Settings
UCPOL
UCSZ2
0
1
0
0
0
0
1
1
1
1
USBS
Transmitted Data Changed
(Output of TxD Pin)
Rising XCK Edge
Falling XCK Edge
0
1
UCSZ1
0
0
1
1
0
0
1
1
UCSZ0
0
1
0
1
0
1
0
1
Received Data Sampled
(Input on RxD Pin)
Falling XCK Edge
Rising XCK Edge
Stop Bit(s)
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
1-bit
2-bit
2490G–AVR–03/04
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