ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 314

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

PROG_ENABLE (0x4)
PROG_COMMANDS (0x5)
PROG_PAGELOAD (0x6)
PROG_PAGEREAD (0x7)
314
ATmega64(L)
The AVR specific public JTAG instruction for enabling programming via the JTAG port.
The 16-bit Programming Enable Register is selected as data register. The active states
are the following:
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The AVR specific public JTAG instruction for entering programming commands via the
JTAG port. The 15-bit Programming Command Register is selected as data register.
The active states are the following:
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•
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The AVR specific public JTAG instruction to directly load the Flash data page via the
JTAG port. The 1024-bit Virtual Flash Page Load Register is selected as data register.
This is a virtual scan chain with length equal to the number of bits in one Flash page.
Internally the Shift Register is 8-bit. Unlike most JTAG instructions, the Update-DR state
is not used to transfer data from the Shift Register. The data are automatically trans-
ferred to the Flash page buffer byte-by-byte in the Shift-DR state by an internal state
machine. This is the only active state:
•
Note:
The AVR specific public JTAG instruction to read one full Flash data page via the JTAG
port. The 1032-bit Virtual Flash Page Read Register is selected as data register. This is
a virtual scan chain with length equal to the number of bits in one Flash page plus eight.
Internally the Shift Register is 8-bit. Unlike most JTAG instructions, the Capture-DR
state is not used to transfer data to the Shift Register. The data are automatically trans-
ferred from the Flash page buffer byte-by-byte in the Shift-DR state by an internal state
machine. This is the only active state:
•
Note:
Shift-DR: the Programming enable signature is shifted into the data register.
Update-DR: The programming enable signature is compared to the correct value,
and programming mode is entered if the signature is valid.
Capture-DR: The result of the previous command is loaded into the data register.
Shift-DR: The data register is shifted by the TCK input, shifting out the result of the
previous command and shifting in the new command.
Update-DR: The programming command is applied to the Flash inputs
Run-Test/Idle: One clock cycle is generated, executing the applied command (not
always required, see Table 131 on page 317).
Shift-DR: Flash page data are shifted in from TDI by the TCK input, and
automatically loaded into the Flash page one byte at a time.
Shift-DR: Flash data are automatically read one byte at a time and shifted out on
TDO by the TCK input. The TDI input is ignored.
The JTAG instruction PROG_PAGELOAD can only be used if the AVR device is the first
device in JTAG scan chain. If the AVR cannot be the first device in the scan chain, the
byte-wise programming algorithm must be used.
The JTAG instruction PROG_PAGEREAD can only be used if the AVR device is the first
device in JTAG scan chain. If the AVR cannot be the first device in the scan chain, the
byte-wise programming algorithm must be used.
2490G–AVR–03/04