ATMEga64L ATMEL Corporation, ATMEga64L Datasheet - Page 67

• Manufacturer Part Number: ATMEga64L
• Description: 8-bit AVR Microcontroller with 64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL Corporation

2490G–AVR–03/04
Consider the clock period starting shortly after the first falling edge of the system clock.
The latch is closed when the clock is low, and goes transparent when the clock is high,
as indicated by the shaded region of the “SYNC LATCH” signal. The signal value is
latched when the system clock goes low. It is clocked into the PINxn Register at the suc-
ceeding positive clock edge. As indicated by the two arrows t
signal transition on the pin will be delayed between ½ and 1-½ system clock period
depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as
indicated in Figure 32. The out instruction sets the “SYNC LATCH” signal at the positive
edge of the clock. In this case, the delay t
clock period.
Figure 32. Synchronization when Reading a Software Assigned Pin Value
INSTRUCTIONS
SYSTEM CLK
SYNC LATCH
PINxn
r16
r17
out PORTx, r16
pd
0x00
nop
t
through the synchronizer is one system
pd
0xFF
in r17, PINx
ATmega64(L)
pd,max
and t
pd,min
0xFF
, a single
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