ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 21

• Manufacturer Part Number: ISL6551EVAL1
• Description: EVALUATION BOARD ISL6551
• Manufacturer: Intersil

Specifications of ISL6551EVAL1

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Isolated
• Voltage - Output: 3.3V
• Current - Output: 60A
• Voltage - Input: 36 ~ 75V
• Regulator Topology: Buck
• Frequency - Switching: 470kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6551
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

Thoughts After Design
Users can use these thoughts to make some possible
improvements of the reference design.
Design Tips For Using ISL6551
1. The input capacitors (C13-C15) can be replaced with
2. The output capacitors (2220 footprint) can be replaced
3. The main transformer (T2) and output chokes (L2 and L3)
4. The current sense transformer (T4) runs hot due to its
5. The overall layout can be improved by removing test point
6. The peak current limit set by the PKILIM is lower than the
7. Users can completely remove the current peak detecting
8. R22 can be replaced with a wire for users to look at the
9. For a narrower range input (48V+/-10%) and/or a lower
1. Since the upper FETs carry not only active currents
2. With assistance of a pre-regulator, the post full-bridge
ceramic capacitors with smaller footprints such as TDK
SMT1812 C4532X7R2A105M.
with smaller footprint 1812 capacitors such as the TDK
new product, C4532X5R0J107M.
are too tall for brick applications with current design form
factors. They can be integrated with the PCB to save
board space and reduce losses. An external inductance
however might be required for ZVS operation because an
integrated PCB transformer would have a very low
leakage inductance, which could not store enough
energy to swing the primary capacitance.
high pinout resistance (more than 10mΩ) and it eats up
too much space, users should redesign the current sense
transformer for better form factor (like J-lead) and thermal
performance. In addition, it cannot be placed
symmetrically in the board due to space constraint. In the
applications of no space limitation, it should be relocated.
connectors (TP1-TR34), which are not required in the
real design.
cycle-by-cycle current limit controlled by the Vclamp, i.e.,
the PKILIM is triggered earlier than the cycle-by-cycle
limit.Thus, the reference-based clamp circuit, for the
cycle-by-cycle current limit accuracy, is not necessary.
circuits (D23, C61..., they are only handy circuits for users
to turned off the synchronous FETs whenever necessary)
and rely on the R134 and C132 to achieve monotonicity
for the output voltage startup. The dead time then can be
cut down.
primary current. It is not an ideal zero Ohm, couple milli-
Ohms could induce 0.2% or higher less efficiency.
output voltage application, a higher turns ratio (4:1) can
improve the efficiency as much as 1%.
through their channels but also freewheeling currents
through their body diodes, the power dissipation of the
upper FETs (QA and QD) is higher than the lower FETs
(QC and QB), which can be replaced with smaller size of
MOSFETs such as SO-8 in moderate primary current
applications. The switching losses however should be
taken into account.
regulator can be designed to operate at a fixed maximum
duty cycle (~100%). Thus, the freewheeling currents flow
21
Application Note 1002
10. In the initial design, use a SOD123 diode (such as
11. For a high current density and multi-layer design, buried
12. The current share support is for paralleling operation but
3. An external commutating inductor can be added in series
4. An external capacitor in parallel with the primary side of
5. External high current bridge drivers cascading with the
6. The higher the switching frequency is, the higher the
7. The current ramp signal to ISENSE should decay to zero
8. The leakage inductance of pulse transformers would
9. To save board space, the silk screen text can be deleted,
through the body diodes of the upper FETs in the shortest
period. The power dissipation of the upper FETs
therefore can be reduced significantly in high primary
current applications. The narrower the input line range is,
the higher the turns ratio of the main transformer can be
chosen, and the higher the efficiency can be achieved.
The power losses and cost of the pre-regulator however
should be taken into account for overall performance
evaluation.
with the primary side of the transformer to assist ZVS
transitions if the energy stored in the leakage inductance
and the magnetizing inductance is less than the energy
stored in the output capacitance (2*Coss) of the power
switches, the primary capacitance (Cp), and any external
capacitance. Extending the ZVS range with an external
inductor is at the penalties of additional component cost
and less effective duty cycle resulting in a lower turns
ratio, which adds power losses to the primary side.
the transformer can help lower the dV/dt and the noise
level without introducing additional losses when the zero-
voltage switching is still retained. The penalties, as
discussed above, still hold.
ISL6551 drivers help absorb the power that supposed to
dissipate in the controller so that the controller is not over
stressed in high gate capacitive load applications, which
extends the application range in a much higher power
level.
system closed-loop bandwidth can be realized, and the
lower the input and output capacitances are required for
overcoming load transients. This, however, comes at the
cost of the efficiency.
prior to or during the clock dead time. Hence, the dead
time should be set long enough to reset the trailing-edge
tail of the current ramp at the maximum duty cycle
operation, otherwise, oscillations could occur.
induce propagation delay depending on the drive current
through it. The higher the energy through the pulse
transformer is, the longer the delay would be.
as some brick manufacturers do today.
MBR0530T1) in series with VDD and VDDP pins to protect
the ISL6551 from being damaged by reverse biasing,
especially for the design with the MLF package, which
cannot to be replaced easily. At the end of the design, the
diode can be substituted with a zero Ohm 805 resistor.
vias can be used to save space, but cost is added.
not for redundancy. When it is used in redundant
systems, it requires OR’ing circuit inserting between the
converter and the common output bus.