ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 25

• Manufacturer Part Number: ISL6551EVAL1
• Description: EVALUATION BOARD ISL6551
• Manufacturer: Intersil

Specifications of ISL6551EVAL1

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Isolated
• Voltage - Output: 3.3V
• Current - Output: 60A
• Voltage - Input: 36 ~ 75V
• Regulator Topology: Buck
• Frequency - Switching: 470kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6551
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

FIGURE 27. TRANSFORMER WAVEFORMS AT V
FIGURE 28. TRANSFORMER WAVEFORMS AT V
FIGURE 29. TRANSFORMER WAVEFORMS AT V
V
PRIMARY CURRENT (I
VOLTAGE (VP); CHANNEL 2: SECONDARY
VOLTAGE (VS)
V
4: PRIMARY CURRENT (I
PRIMARY VOLTAGE (VP); CHANNEL 2:
SECONDARY VOLTAGE (VS)
V
SCHEME). CHANNEL 4: PRIMARY CURRENT
(I
CHANNEL 2: SECONDARY VOLTAGE (VS)
OUT
OUT
OUT
P
); CHANNEL 3: PRIMARY VOLTAGE (VP);
=3.3V, AND I
=3.3V, AND I
=3.3V, AND I
25
OUT
OUT
OUT
=0.5A (SYN OFF). CHANNEL
=0A (SYN ON). CHANNEL 4:
=60A (INV_SYNC DRIVE
P
); CHANNEL 3: PRIMARY
2
3
P
); CHANNEL 3:
2
3
3
2
IN
IN
4
IN
4
Application Note 1002
=48V,
=48V,
=48V,
4
ZVS TRANSITIONS
Figures 30 to 34 show resonant transitions for the lower FET
in various situations, and they are taken by shortening the
loop that is used to measure the primary current. Table 5
summarizes the ZVS conditions of one converter for various
input and output voltages (which do not apply to every
converter since the ZVS conditions of each converter are
heavily dependant upon the leakage inductance and the
output capacitance of the primary switches). In the nominal
48V input and 3.3V output condition, the converter loses
ZVS transitions below 62% of full load, as shown in Figure
31. At the low line (36V) situation, ZVS transitions extend to
42% of full load, as shown in Figure 33, since the energy
stored in the parasitic capacitance is proportional to V
and reaches its minimum. On the other hand, the high line
(75V) completely loses ZVS transitions even at 100% load
since the energy stored in the parasitic capacitance reaches
its maximum and the energy in the commutating inductance
is not enough to resonate the tank to the valley, as shown in
Figure 34.
FIGURE 30. RESONANT TRANSITION AT V
V
IN
36V
48V
75V
\V
OUT
AND I
LOWER FET; CHANNEL 3: LOWER GATE DRIVE
SIGNAL
>100%
TABLE 5. ZVS LOAD RANGE
2.64V
<50%
<75%
OUT
=60A. CHANNEL 2: V
>100%
3.30V
<42%
<62%
IN
DS
=48V, V
VOLTAGE OF
3.63V
<33%
<58%
<92%
OUT
IN
=3.3V,
2