ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 35

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ISL6551EVAL1

Manufacturer Part Number
ISL6551EVAL1
Description
EVALUATION BOARD ISL6551
Manufacturer
Intersil
Datasheets

Specifications of ISL6551EVAL1

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Isolated
Voltage - Output
3.3V
Current - Output
60A
Voltage - Input
36 ~ 75V
Regulator Topology
Buck
Frequency - Switching
470kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6551
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Figure 73 shows three portions of the system loop for 3.3V
38A resistive loaded output: 1) Plant (Vo/Ve), 2) Feedback
compensation, and 3) Differential amplifier. The overall loop
is the sum of these components, in which the feedback
compensation and the differential amplifier are fixed elements
and the plant is a variable depending on the load.
Figure 75 shows loop responses for three different types of
loads: “pure” resistive load, electronic constant current load,
and electronic resistive load. The responses vary
significantly at low frequencies, but the frequencies of
interest that define the phase margin and gain margin shift
little at high frequencies, therefore, the system stability can
be studied by just looking at the loop response against the
constant current load.
FIGURE 72. PLANT FREQUENCY RESPONSE FOR 3.3V@38A
FIGURE 73. FREQUENCY RESPONSE OF 1) PLANT (Vo/Ve), 2)
PHASE
RESISTIVE LOAD. RED-48V, BLUE-75V, AND
BLACK-36V
FEEDBACK COMPENSATION,
3) DIFFERENTIAL AMPLIFIER, AND
4) OPEN LOOP FOR V
RESISTIVE LOAD. RED-GAIN AND BLUE-PHASE
4
35
IN
1
=48V, V
GAIN
2
OUT
=3.3V@38A
Application Note 1002
3
Figures 76 to 81 show loop responses for various input and
output conditions including four corners. It can be concluded
that the system is stable in under all input and output
operating conditions since it has a 20-30kHz loop bandwidth,
around 10dB gain margin, and above 45
One thing that should be noted is that the tail of the gain,
caused by the ESL of output capacitors, at above 200kHz
increases with the frequency. If it still exists and causes a
problem in a real system, users can lower the pole at the
differential amplifier stage to smooth it out (say 100pF for
both C27 and C28). The gain of the feedback compensation
however should be adjusted, as necessary, to design a
favorable gain margin and phase margin system.
FIGURE 74. PLANT RESPONSE FOR THREE KINDS OF
FIGURE 75. OPEN LOOP RESPONSE FOR THREE KINDS OF
2
AREA OF INTEREST
LOADS AT 48V, 3.3V@38A. RED(1)-”PURE”
RESISTIVE LOAD, BLUE(2)-ELECTRONIC
CONSTANT CURRENT LOAD, AND BLACK(3)-
ELECTRONIC RESISTIVE LOAD.
LOADS AT 48V, 3.3V@38A. RED-”PURE”
RESISTIVE LOAD, BLUE-ELECTRONIC
CONSTANT CURRENT LOAD, AND BLACK-
ELECTRONIC RESISTIVE LOAD
3
1
o
phase margin.

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