ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 3

• Manufacturer Part Number: ISL6551EVAL1
• Description: EVALUATION BOARD ISL6551
• Manufacturer: Intersil

Specifications of ISL6551EVAL1

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Isolated
• Voltage - Output: 3.3V
• Current - Output: 60A
• Voltage - Input: 36 ~ 75V
• Regulator Topology: Buck
• Frequency - Switching: 470kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6551
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

LOW2
VP
In the above Figure, T0 through T8 are exaggerated only for demonstration purposes. There are three possible
synchronous rectification drive schemes:
LOW1
T0-T1=LOWER RIGHT-LEG POWER TRANSFER PERIOD
T1-T2=UPPER LEFT-TO-RIGHT FREEWHEELING PERIOD
T2-T3=Q1-TO-Q2 DEADTIME (FREEWHEELING)
T3-T4=LOWER LEFT-LEG RESONANT PERIOD
CLOCK
UP1
UP2
SYNC1
SYNC2
SYNC2
SYNC1
LOW1’
1. Existing Synchronous Drive Signals (Sync1 & Sync2) + Non-inverting High Current Drivers (such as MIC4422)- The
2. Lower Drive Signals + Proper Delay + Inverting High Current Drivers (such as MIC4421)- The corresponding
3. Existing Synchronous Drive Signals + Inverting High Current Drivers- The synchronous FETs are turned on together at
LOW2’
2
3
1
Synchronous Fets (Q1 & Q2) are turned off together at the dead time and turned on alternatively every clock period;
synchronous FET is turned off whenever a voltage is across the secondary winding;
the dead time and turned on alternately every clock period.
T0
3
T1
T2
FIGURE 4. DRIVE SIGNALS TIMING DIAGRAM
T3
T4
Application Note 1002
T5
T6
T7
T4-T5=LOWER LEFT-LEG POWER TRANSFER PERIOD
T5-T6=UPPER RIGHT-TO-LEFT FREEWHEELING PERIOD
T6-T7=Q2-TO-Q1 DEADTIME (FREEWHEELING)
T7-T8=LOWER RIGHT-LEG RESONANT PERIOD
T8=T0
Q1
Q2
Q2
Q1
Q1
Q2
QC
QB
QD
QA