ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 4

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ISL6551EVAL1

Manufacturer Part Number
ISL6551EVAL1
Description
EVALUATION BOARD ISL6551
Manufacturer
Intersil
Datasheets

Specifications of ISL6551EVAL1

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Isolated
Voltage - Output
3.3V
Current - Output
60A
Voltage - Input
36 ~ 75V
Regulator Topology
Buck
Frequency - Switching
470kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6551
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
T0-T1=LOWER RIGHT-LEG POWER TRANSFER PERIOD
T1-T2=UPPER LEFT-TO-RIGHT FREEWHEELING PERIOD
In the above figure, T0 through T8 are exaggerated only for demonstration purposes. The slope of each waveform is in
an approximation. For a more accurate representation, losses should be included. The worst case happens at only
Q1 or Q2 carrying the load current during the freewheeling period. The current distribution through Q1 and Q2 is different
in these three drive schemes. Case 2 is the best option since both of its synchronous FETs are turned on during the free-
wheeling period. Note that VS is in the case of no primary leakage inductance, otherwise, delay would be induced, as
illustrated in the experimental results.
T2-T3=Q1-TO-Q2 DEADTIME (FREEWHEELING)
T3-T4=LOWER LEFT-LEG RESONANT PERIOD
WORST CASE
WORST CASE
WORST CASE
WORST CASE
SYNC1
SYNC2
SYNC2
SYNC1
I
LOW1’
I
I
LOW2’
Q1
MAG
Q2
VS
T0-RESDLY
1
2
I
I
I
3
P
LO1
LO2
I
I
S
LO
T0
4
T1
T2
FIGURE 5. CURRENT WAVEFORMS
T3
Application Note 1002
T4
T5
T6
T4-T5=LOWER LEFT-LEG POWER TRANSFER PERIOD
T5-T6=UPPER RIGHT-TO-LEFT FREEWHEELING PERIOD
T6-T7=Q2-TO-Q1 DEADTIME (FREEWHEELING)
T7-T8=LOWER RIGHT-LEG RESONANT PERIOD
T7
T8=T0
Q1
Q1
Q2
Q1
Q2
Q2
0
Imag
---------------- -
Imag
---------------- -
Io Fclock
Io
Io
-------- -
2N
Vin
--------- -
Vin
--------- -
Io
----- Fsw
Io
---- -
-------- -
2N
0
Io
---- -
Io
----- Fsw
2
0
Io
2
Io
2
2
N
N
2
,
2
,
,

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