ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 41

• Manufacturer Part Number: ISL6551EVAL1
• Description: EVALUATION BOARD ISL6551
• Manufacturer: Intersil

Specifications of ISL6551EVAL1

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Isolated
• Voltage - Output: 3.3V
• Current - Output: 60A
• Voltage - Input: 36 ~ 75V
• Regulator Topology: Buck
• Frequency - Switching: 470kHz
• Board Type: Fully Populated
• Utilized Ic / Part: ISL6551
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

Output Turned Off Characteristic
When the converter is turned off by an operator or a fault, the
energy stored in the output inductors and capacitors is
dissipated in the parasitic resistance of the output inductors
and capacitors, the load, and the synchronous FETs.
In Figure 101, the output current lags by 90° from the output
voltage, which means that the output load (electronic load)
behaves inductively when the converter is turned off. Note
that the electronic load is not activated until its input is above
0.95V. The delay to turn off the synchronous FETs is
induced by the C60 and C58 in the peak current detecting
circuit on page 6 of the schematics, which allows negative
currents through the Channels during this period. Since the
electronic load does not behave resistively and the losses
due to the Rds(on) of the synchronous FETs are relatively
small, the output L-C resonant tank cannot be heavily
dampened, which causes the output ringing down to an
undesired negative voltage (-2V). With an 1000uF Aluminum
capacitor at the output, the resonant frequency decreases
but the stored energy increases; however, the negative spike
does cut down by a small amount, as shown in Figure 102.
With the assistance of additional output capacitance and
additional circuits, as shown on page 6 of the schematics
(D131...), to turn off the synchronous FETs by a fault or an
operator, the negative spike is reduced to an acceptable
level (200mV), as shown in Figure 104. Note that the 1000uF
Aluminum capacitor at the output is necessary to help
reduce the negative spike to a controllable level.
FIGURE 100. OUTPUT VOLTAGE STARTUP EXPANSION
(CHANNEL 1) AT V
I
CURRENT MODE. CHANNEL 2: ERROR VOLTAGE;
CHANNEL 3: VCLAMP VOLTAGE; CHANNEL 4:
CURRENT RAMP (ISENSE). 100US/DIV.
OUT
=60A, 1A/US ELECTRONIC CONSTANT
41
IN
=48V, V
OUT
=2.64V, AND
Application Note 1002
FIGURE 101. V
FIGURE 102. V
FIGURE 103. V
WITH NO ADDITIONAL CAP. CHANNEL 1: OUTPUT
VOLTAGE; CHANNEL 2: SYNCHRONOUS FET GATE
SIGNAL; CHANNEL 4: OUTPUT CURRENT
WITH 1000uF ALUMINUM CAPACITOR. CHANNEL 1:
OUTPUT VOLTAGE; CHANNEL 2: SYNCHRONOUS
FET GATE SIGNAL; CHANNEL 4: OUTPUT CURRENT
WITH NO ADDITIONAL CAP. CHANNEL 1: OUTPUT
VOLTAGE; CHANNEL 2: SYNCHRONOUS FET
GATE SIGNAL; CHANNEL 4: OUTPUT CURRENT
IN
IN
IN
=48V, V
=48V, V
=48V, V
OUT
OUT
OUT
=3.3V, I
=3.3V, I
=3.3V, I
OUT
OUT
OUT
=60A ELECTRONIC LOAD
=60A ELECTRONIC LOAD
=60 ELECTRONIC LOAD