ISL6551EVAL1 Intersil, ISL6551EVAL1 Datasheet - Page 43

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ISL6551EVAL1

Manufacturer Part Number
ISL6551EVAL1
Description
EVALUATION BOARD ISL6551
Manufacturer
Intersil
Datasheets

Specifications of ISL6551EVAL1

Main Purpose
DC/DC, Step Down
Outputs And Type
1, Isolated
Voltage - Output
3.3V
Current - Output
60A
Voltage - Input
36 ~ 75V
Regulator Topology
Buck
Frequency - Switching
470kHz
Board Type
Fully Populated
Utilized Ic / Part
ISL6551
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
on, they will not be turned off again unless the converter re-
start up at low load conditions. In addition to that, some
circuits are used to turn off the synchronous FETs at a high
speed to eliminate any negative voltage spike when the
converter is shut down by an operator or a fault.
Layout
The components of the converter are placed on both top and
bottom layers within a particular area. Figures 107 and 108
show where each portion of circuit is placed on both layers.
Since it is a high current density design, 10 layers with 4 oz
copper have been used in the PCB layout. In addition, a
buried vias technique has also been applied. A careful and
proper layout helps to lower EMI and reduce bugs and
development time. Users should use as much time as
needed and is possible to layout the board very carefully
following guidance. Some guidance for laying out the
reference design is discussed in the Layout Considerations
section on page 17. Refer to [5] for additional layout
guidelines.
FIGURE 107. COMPONENT PLACEMENT OUTLINE
Test Points
ON TOP LAYER
BJ1, BJ2, C12, F1, & L1
PC1 & PC4
Output
Inductors
Main
XFMR
Pri. FETs
5.00”
TP4 & TP5
43
Test Points
Application Note 1002
BJ17
Conclusion
The ZVS technique of the ISL6551 full-bridge controller is
presented. The superior performance of the ISL6551, with its
companions Intersil’s HIP2100 half-bridge driver and
ISL6550 Supervisor And Monitor, has been demonstrated in
the reference design of a 200W, 470kHz telecom power
supply incorporating both full-bridge and current doubler
topologies.The converter is implemented with secondary-
side peak current mode control and includes output
overload, input under-voltage, and output over-voltage and
under-voltage protection features. A footprint for a thermistor
is ready for users to implement thermal protection on the
primary side. An ultra high efficiency of 88% at 3.3V output
and 60A full load has been achieved.
This application note includes a step-by-step design
procedure for the converter, which allows for easier
component selection and customization of this reference
design for a broader base of applications. Users can use
equations, presented in the CONVERTER DESIGN section
to determine the turns ratio of the main transformer and the
switching frequency, to estimate power dissipation of primary
switches and synchronous rectifiers, and to calculate I/O
filters design parameters. By entering these calculations in a
worksheet, users can do numerical iterations and choose
appropriate components for their applications in an easier
manner. The open loop response of the system can be
roughly approximated using the simplified model.
In addition, extensive experimental results give users a
better understanding of the operation of the converter, the
ISL6551, and the ISL6550.
FIGURE 108. COMPONENT PLACEMENT OUTLINE
ON BOTTOM LAYER
Input Caps (p2)
Output Capacitors
Pulse XFMRs
T3 & T5
2.45”

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