SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 121

• Manufacturer Part Number: SW-QUARTUS-SE-FIX
• Description: QUARTUS II ANNUAL SUBSCRIPTION
• Manufacturer: Altera
• Type: Design Softwarer
• Series: QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

• Mfg Application Notes: Software Licensing App Note
• Core Architecture: CPLD, FPGA
• Supported Families: Quartus II, Nios II
• Software Edition: Standard
• License Type: Fixed - Node
• Supported Hosts: Windows
• Rohs Compliant: NA
• For Use With/related Products: Altera Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1247; FIXEDPC

C
T
Timing Analysis with EDA Tools
112
IMING
HAPTER
f
■
A
NALYSIS WITH
8: EDA T
I
NTRODUCTION TO THE
In the Quartus II software, the information for specific device architecture
entities and megafunctions is located in post-routing atom-based timing
simulation libraries. The timing simulation library files differ based on
device family and whether you are using Verilog Output Files or VHDL
Output Files. For VHDL designs, Altera provides VHDL Component
Declaration files for designs with Altera-specific megafunctions.
The Quartus II software supports timing analysis and minimum timing
analysis with the Synopsys PrimeTime software on Linux and board-level
timing analysis with the Mentor Graphics Tau board-level verification tools.
To generate the necessary output files for performing timing analysis in
EDA timing analysis tools, specify the appropriate timing analysis tool in
the Timing Analysis and Board-Level pages under EDA Tool Settings in
the Settings dialog box, and then perform a full compilation.
You can also generate the files by pointing to Start on the Processing menu,
and then clicking Start EDA Netlist Writer after an initial compilation. If
you are using the NativeLink feature, you can also run a timing analysis
after an initial compilation by clicking Run EDA Timing Analysis Tool on
the Tools menu.
For Information About
Functional Simulation libraries
included with the Quartus II software
Performing simulation using the
ModelSim or ModelSim-Altera software
Performing simulation with the VCS
software
Performing simulation with the
Cadence Incisive Enterprise Simulator
software
Performing simulation with the Aldec
Active-HDL software
Performing simulation of Altera IP with
EDA tools
OOL
EDA T
S
UPPORT
OOLS
Q
UARTUS
II S
OFTWARE
Refer To
“Altera Functional Simulation Libraries” in
Quartus II Help
Mentor Graphics ModelSim Support chapter
in volume 3 of the Quartus II Handbook
Synopsys VCS and VCS-MX Support chapter
in volume 3 of the Quartus II Handbook
Cadence NC-Sim Support chapter in
volume 3 of the Quartus II Handbook
Aldec Active HDL Support chapter in
volume 3 of the Quartus II Handbook
Simulating Altera IP in Third-Party
Simulation Tools chapter in volume 3 of the
Quartus II Handbook
A
LTERA
C
ORPORATION