SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 78

QUARTUS II ANNUAL SUBSCRIPTION

SW-QUARTUS-SE-FIX

Manufacturer Part Number
SW-QUARTUS-SE-FIX
Description
QUARTUS II ANNUAL SUBSCRIPTION
Manufacturer
Altera
Type
Design Softwarer
Series
QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

Mfg Application Notes
Software Licensing App Note
Core Architecture
CPLD, FPGA
Supported Families
Quartus II, Nios II
Software Edition
Standard
License Type
Fixed - Node
Supported Hosts
Windows
Rohs Compliant
NA
For Use With/related Products
Altera Devices
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1247
FIXEDPC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SW-QUARTUS-SE-FIX
Manufacturer:
Altera
Quantity:
135
A
LTERA
C
ORPORATION
!
You can also run the TimeQuest analyzer separately at the command prompt or in
a script by using the quartus_sta executable. You must run the Quartus II Fitter
executable quartus_fit before running the TimeQuest analyzer.
The quartus_sta executable creates a separate text-based report file that can be
viewed with any text editor.
You can also launch the quartus_sta Tcl scripting shell, to run timing-related Tcl
commands, by typing the following command at a command prompt:
quartus_sta -s
If you want to get help on the quartus_sta executable, type one of the following
commands at the command prompt:
quartus_sta --h
quartus_sta --help
quartus_sta --help=<topic name>
Additionally, the quartus_staw executable provides the GUI for the TimeQuest
analyzer as a stand-alone application.
ignore) paths between unrelated clock domains when there are no
timing requirements set or only the default required f
is used. The Quartus II software also cuts paths between unrelated
clock domains if individual clock assignments are set but there is no
defined relationship between the clock assignments.
Maximum delay requirements—Requirements for input or output
maximum delay, or maximum timing requirements for t
t
specific nodes or groups to override project-wide maximum timing
requirements.
Minimum delay requirements—Requirements for input or output
minimum delay, or minimum timing requirements for t
for specific nodes or groups. You can make these assignments to
specific nodes or groups to override project-wide minimum timing
requirements.
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Using the quartus_sta executable
on specific nodes in the design. You can make these assignments to
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69

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