SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 29

• Manufacturer Part Number: SW-QUARTUS-SE-FIX
• Description: QUARTUS II ANNUAL SUBSCRIPTION
• Manufacturer: Altera
• Type: Design Softwarer
• Series: QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

• Mfg Application Notes: Software Licensing App Note
• Core Architecture: CPLD, FPGA
• Supported Families: Quartus II, Nios II
• Software Edition: Standard
• License Type: Fixed - Node
• Supported Hosts: Windows
• Rohs Compliant: NA
• For Use With/related Products: Altera Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1247; FIXEDPC

C
I
Introduction
Figure 1. Design Entry Flow
20
NTRODUCTION
Files generated by the
MegaWizard Plug-In
Manager
Block Symbol Files (.bsf)
HAPTER
■
2: D
I
NTRODUCTION TO THE
MegaWizard Plug-In
ESIGN
A Quartus II project includes all of the design files, software source files, and
other related files necessary for the eventual implementation of a design in
a programmable logic device. You can use the Quartus II Block Editor, Text
Editor, MegaWizard Plug-In Manager, and EDA design entry tools to create
design files that include Altera megafunctions, library of parameterized
modules (LPM) functions, and intellectual property (IP) functions.
shows the design entry flow.
The Quartus II software also supports system-level design entry flows with
the Altera SOPC Builder and DSP Builder software. For more information
about these methods, refer to
page
Symbol Editor
Quartus II
Manager
E
199.
NTRY
Q
Verilog HDL &
VHDL design
files
UARTUS
II S
EDA Synthesis
Block Editor
Text Editor
Quartus II
Quartus II
“Chapter 16: System-Level Design” on
OFTWARE
Tool
EDIF netlist files (.edf)
or Verilog Quartus
Mapping Files (.vqm)
Block Design Files (.bdf)
Quartus II Exported
Partition Files (.qxp)
Text Design Files (.tdf) &
Verilog HDL & VHDL
design files (.v, .vhd)
A
LTERA
C
ORPORATION
Figure 1
to
Quartus II
Analysis &
Synthesis