SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 75

• Manufacturer Part Number: SW-QUARTUS-SE-FIX
• Description: QUARTUS II ANNUAL SUBSCRIPTION
• Manufacturer: Altera
• Type: Design Softwarer
• Series: QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

• Mfg Application Notes: Software Licensing App Note
• Core Architecture: CPLD, FPGA
• Supported Families: Quartus II, Nios II
• Software Edition: Standard
• License Type: Fixed - Node
• Supported Hosts: Windows
• Rohs Compliant: NA
• For Use With/related Products: Altera Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1247; FIXEDPC

C
I
Introduction
Running the TimeQuest Timing
Analyzer
66
NTRODUCTION
HAPTER
■
5: T
I
NTRODUCTION TO THE
IMING
The Quartus II TimeQuest Timing Analyzer allows you to analyze the
timing characteristics of your design. The TimeQuest analyzer uses
industry-standard Synopsys Design Constraint (SDC) methodology for
constraining designs and reporting results. You can use the information
generated by the timing analyzer to analyze, debug, and validate the timing
performance of your design.
The TimeQuest analyzer provides an intuitive and easy-to-use GUI that
allows you to constrain and analyze designs efficiently. The GUI is divided
into the following four panes:
■
■
■
■
Each pane provides features that enhance the productivity of performing
static timing analysis in the TimeQuest analyzer
View pane
Tasks pane
Console
Report pane
A
NALYSIS AND
Q
D
UARTUS
ESIGN
O
II S
PTIMIZATION
OFTWARE
(Figure
A
1).
LTERA
C
ORPORATION