SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 65

• Manufacturer Part Number: SW-QUARTUS-SE-FIX
• Description: QUARTUS II ANNUAL SUBSCRIPTION
• Manufacturer: Altera
• Type: Design Softwarer
• Series: QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

• Mfg Application Notes: Software Licensing App Note
• Core Architecture: CPLD, FPGA
• Supported Families: Quartus II, Nios II
• Software Edition: Standard
• License Type: Fixed - Node
• Supported Hosts: Windows
• Rohs Compliant: NA
• For Use With/related Products: Altera Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1247; FIXEDPC

C
A
56
NALYZING
HAPTER
f
■
4: P
F
I
NTRODUCTION TO THE
ITTING
LACE AND
Using the Report Window or Report
File to View Fitting Results
The Report window contains many sections that can help you analyze the
placement and routing of your design. It includes several sections that show
resource usage, and also lists error messages that were generated by the
Fitter, as well as messages for any other module you were running.
The Quartus II software automatically generates text and HTML versions of
reports, depending on which options you specify in the Processing page of
the Options dialog box.
Using the Chip Planner to Analyze
Results
After you run the Fitter, the Chip Planner displays the results of placement
and routing. In addition, you can back-annotate the fitting results to
preserve the resource assignments made during the last compilation. The
Chip Planner allows you to view logic placement made by the Fitter and/or
user assignments, make LogicLock region assignments, and view routing
congestion
For Information About
Report Window sections
Using the Report Window
Viewing the compilation report
R
ESULTS
R
OUTE
(Figure
Q
3).
UARTUS
II S
OFTWARE
Refer To
"List of Compilation and Simulation
Reports" in Quartus II Help
“Navigating the Report Window” in
Quartus II Help
"Module 3: Compile a Design" in the
Quartus II Interactive Tutorial
A
LTERA
C
ORPORATION