SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 59
SW-QUARTUS-SE-FIX
Manufacturer Part Number
SW-QUARTUS-SE-FIX
Description
QUARTUS II ANNUAL SUBSCRIPTION
Manufacturer
Altera
Type
Design Softwarer
Series
QUARTUS IIr
Specifications of SW-QUARTUS-SE-FIX
Mfg Application Notes
Software Licensing App Note
Core Architecture
CPLD, FPGA
Supported Families
Quartus II, Nios II
Software Edition
Standard
License Type
Fixed - Node
Supported Hosts
Windows
Rohs Compliant
NA
For Use With/related Products
Altera Devices
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1247
FIXEDPC
FIXEDPC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SW-QUARTUS-SE-FIX
Manufacturer:
Altera
Quantity:
135
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C
A
50
NALYZING
HAPTER
f
■
3: S
S
I
NTRODUCTION TO THE
YNTHESIS
YNTHESIS
Viewer; see
page
information as well as node and source information.
After performing timing analysis or performing a full compilation that
includes timing analysis, you can also use the Technology Map Viewer to
view the nodes that make up the timing path, including information about
total delay and individual node delay. See
Technology Map Viewer” on page 72 in Chapter 5, “Timing Analysis and
Design Optimization.”
For Information About
Using the Quartus II Technology Map
Viewer
R
45. The tooltips in the Technology Map Viewer display equation
ESULTS
“Analyzing Synthesis Results With the Netlist Viewers” on
W
ITH THE
Q
UARTUS
N
ETLIST
II S
V
IEWERS
OFTWARE
Refer To
Analyzing Designs with Quartus II Netlist
Viewers chapter in volume 1 of the
Quartus II Handbook
“About the Netlist Viewers” in Quartus II
Help
“Viewing Timing Delays with the
A
LTERA
C
ORPORATION
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