SW-QUARTUS-SE-FIX Altera, SW-QUARTUS-SE-FIX Datasheet - Page 18

• Manufacturer Part Number: SW-QUARTUS-SE-FIX
• Description: QUARTUS II ANNUAL SUBSCRIPTION
• Manufacturer: Altera
• Type: Design Softwarer
• Series: QUARTUS IIr

Specifications of SW-QUARTUS-SE-FIX

• Mfg Application Notes: Software Licensing App Note
• Core Architecture: CPLD, FPGA
• Supported Families: Quartus II, Nios II
• Software Edition: Standard
• License Type: Fixed - Node
• Supported Hosts: Windows
• Rohs Compliant: NA
• For Use With/related Products: Altera Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1247; FIXEDPC

Table 2. Command-Line Executables (Part 2 of 2)
A
quartus_jli
quartus_jbcc
quartus_sim
quartus_pow
quartus_pgm
quartus_cpf
quartus_stp
quartus_si
quartus_sh
LTERA
Executable
Name
C
ORPORATION
Jam STAPL Player
Jam Compiler
Simulator
Power Analyzer
Programmer
Programming File
Converter
SignalTap II Logic
Analyzer
SSN Analyzer
Tcl Shell
Title
I
NTRODUCTION TO THE
Reads and executes Jam Files (.jam) in the STAPL
format. A single Jam File can perform several
functions, such as programming, configuring,
verifying, erasing, and blank-checking a
programmable device in a JTAG chain.
The Quartus II JAM Compiler converts Jam/STAPL
files to Jam Byte Code Files (.jbc) which store
data for programming, configuring, verifying,
and blank-checking one or more devices in a
JTAG chain.
Performs functional or timing simulation on your
design. Analysis & Synthesis must be run before
performing a functional simulation. Timing
Analysis must be run before performing a timing
simulation.
Analyzes and estimates total dynamic and static
power consumed by a design. Computes toggle
rates and static probabilities for output signals.
The Fitter must be run successfully before
running the PowerPlay Power Analyzer.
Programs Altera devices.
Converts programming files to secondary
programming file formats.
Sets up your SignalTap II File (.stp). When it is
run after the Assembler, the SignalTap II Logic
Analyzer captures signals from internal device
nodes while the device is running at speed.
Estimates and reports the simultaneous
switching noise contributions to voltage and
timing noise for device pins.
Provides overall control of Quartus II projects
and compilation flows, as well as a Tcl shell.
Q
UARTUS
Function
C
C
OMMAND
HAPTER
II S
OFTWARE
-L
1: D
INE
ESIGN
E
XECUTABLES
■
F
LOW
9