AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 137

IC TXRX ZIGBE/802.15.4/ISM 32QFN

AT86RF212-ZU

Manufacturer Part Number
AT86RF212-ZU
Description
IC TXRX ZIGBE/802.15.4/ISM 32QFN
Manufacturer
Atmel
Datasheet

Specifications of AT86RF212-ZU

Frequency
700MHz, 800MHz, 900MHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, ISM
Applications
ISM, ZigBee™
Power - Output
10dBm
Sensitivity
-110dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
9.2mA
Current - Transmitting
25mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
769 MHz to 935 MHz
Interface Type
SPI
Noise Figure
7 dB
Output Power
21 dB
Operating Supply Voltage
1.8 V, 3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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9.1.6 Security Operation Status
9.1.7 SRAM Register Summary
9.1.8 Register Description
8168C-MCU Wireless-02/10
The status of the security processing is indicated by register 0x82 (AES_STATUS).
After 24 µs AES processing time register bit AES_DONE changes to 1 (register 0x82,
AES_STATUS) indicating that the security operation has finished, see parameter
10.4.14 in section 10.4.
The following registers are required to control the security module:
Table 9-2. SRAM Security Module Address Space Overview
These registers are only accessible using SRAM write and read; for details, refer to
section 4.3.3. Note that the SRAM registers are reset when entering the SLEEP state.
Register 0x82 (AES_STATUS):
This read-only register signals the status of the security module and operation.
Table 9-3. Register 0x82 (AES_STATUS)
• Bit 7 – AES_ER
This SRAM register bit indicates an error of the AES module. An error may occur for
instance after an access to SRAM register 0x83 (AES_CTRL) while an AES operation
is running or after reading less than 128 bits from SRAM register space 0x84 – 0x93
(AES_STATE).
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
SRAM-Addr.
0x80 – 0x81
0x82
0x83
0x84 – 0x93
0x94
0x95 – 0xFF
7
AES_ER
R
0
3
Reserved
R
0
Register Name
AES_STATUS
AES_CTRL
AES_KEY
AES_STATE
AES_CTRL_MIRROR
6
Reserved
R
0
2
Reserved
R
0
Description
Reserved
AES status
Security module control, AES mode
Depends on AES_MODE setting:
AES_MODE = 1:
- Contains AES_KEY (key)
AES_MODE = 0 | 2:
- Contains AES_STATE (128 bit data block)
Mirror of register 0x83 (AES_CTRL)
Reserved
5
Reserved
R
0
1
Reserved
R
0
AT86RF212
4
Reserved
R
0
0
AES_DONE
R
0
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