AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 59

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.2.6 Register Description
8168C-MCU Wireless-02/10
The TRX_END interrupt is always generated after completing a TX_ARET transaction.
After that, the return code can be read from subfield TRAC_STATUS (register 0x02,
TRX_STATE).
Several interrupts are automatically suppressed by the radio transceiver during
TX_ARET transaction. In contrast to section 6.6, the CCA algorithm (part of CSMA-CA)
does not generate interrupt IRQ_4 (CCA_ED_DONE). Furthermore, the interrupts
RX_START and AMI are not generated during the TX_ARET acknowledgment receive
process.
Register Summary
The following registers control the Extended Operating Mode.
Table 5-16. Extended Operating Mode Register Summary
Register 0x01 (TRX_STATUS):
The read-only register TRX_STATUS provides the current state of the radio transceiver.
A state change is initiated by writing a state transition command to register bits
TRX_CMD (register 0x02, TRX_STATE).
Table 5-17. Register 0x01 (TRX_STATUS)
• Bit 7:6 – CCA_DONE, CCA_STATUS
Refer to section 6.6.6; not updated in Extended Operating Mode.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
Reg.-Addr.
0x2B
0x2C
0x2D
0x2E
0x2F
0x01
0x02
0x04
0x08
0x09
0x17
0x20
…
7
CCA_DONE
R
0
3
TRX_STATUS[3]
R
0
Register Name
TRX_STATUS
TRX_STATE
TRX_CTRL_1
PHY_CC_CCA
CCA_THRES
XAH_CTRL_1
XAH_CTRL_0
CSMA_SEED_0
CSMA_SEED_1
CSMA_BE
6
CCA_STATUS
R
0
2
TRX_STATUS[2]
R
0
Description
Radio transceiver status, CCA result
Radio transceiver state control, TX_ARET status
TX_AUTO_CRC_ON
CCA mode control, see section 6.6.6
CCA ED threshold settings, see section 6.6.6
RX_AACK control
Frame Filter configuration
-
-
TX_ARET control, retries value control
CSMA-CA seed value
CSMA-CA seed value, RX_AACK control
CSMA-CA backoff exponent control
Short address, PAN ID, and IEEE address
See section 6.2.3
5
Reserved
R
0
1
TRX_STATUS[1]
R
0
AT86RF212
4
TRX_STATUS[4]
R
0
0
TRX_STATUS[0]
R
0
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