AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 97

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.2 Receiver (RX)
7.2.1 Overview
8168C-MCU Wireless-02/10
Table 7-4. O-QPSK Data Rate during PSDU
In Table 7-5 all PHY modes supported by the AT86RF212 are summarized with the
relevant setting for each bit of register TRX_CTRL_2. The “-“ (minus) character means
that the bit entry is not relevant for the particular PHY mode.
Table 7-5. Register 0x0C (TRX_CTRL_2) Bit Alignment
The AT86RF212 transceiver is split into an analog radio front-end and a digital domain,
see Figure 1-1. Referring to the receiver part of the analog domain, the differential RF
signal is amplified by a low noise amplifier (LNA) and split into quadrature signals by a
poly-phase filter (PPF). Two mixer circuits convert the quadrature signal down to an
intermediate frequency. Channel selectivity is achieved by an integrated band-pass
filter (BPF). The subsequent analog-to-digital converter (ADC) samples the receive
signal and additionally generates a digital RSSI signal, see section 6.4. The ADC output
is then further processed by the digital baseband receiver (RX BBP), which is part of
the digital domain.
PHY Mode
BPSK-20
BPSK-40
OQPSK-SIN-RC-100
OQPSK-SIN-RC-200
OQPSK-SIN-RC-400-SCR-ON
OQPSK-SIN-RC-400-SCR-OFF
OQPSK-SIN-250
OQPSK-SIN-500
OQPSK-SIN-1000-SCR-ON
OQPSK-SIN-1000-SCR-OFF
OQPSK-RC-250
OQPSK-RC-500
OQPSK-RC-1000-SCR-ON
OQPSK-RC-1000-SCR-OFF
Register Bits
OQPSK_DATA_RATE
Value
7 6 5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bits of Register 0x0C
0
1
2
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
0
1
0
1
0
-
-
-
-
-
-
-
-
4
0
0
0
0
0
0
0
0
0
0
1
1
1
1
SUB_MODE = 0
3
0
0
1
1
1
1
1
1
1
1
1
1
1
1
2 1
0
1
0
0
0
0
1
1
1
1
1
1
1
1
100
200
400
0
0
0
0
1
1
0
0
1
1
0
0
1
1
O-QPSK Data Rate [kbit/s]
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
Compliance
IEEE 802.15.4-2003/2006:
channel page 0, channel 0
IEEE 802.15.4-2003/2006:
channel page 0, channel 1 to 10
IEEE 802.15.4-2006:
channel page 2, channel 0
Proprietary
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IEEE 802.15.4-2006:
channel page 2, channel 1 to 10
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IEEE 802.15.4c-2009 (China):
channel page 5, channel 0 to 3
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Reserved
AT86RF212
SUB_MODE = 1
1000
250
500
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