AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 20

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 4-12. Packet Structure – SRAM Write Access
Figure 4-13. Exemplary SPI Sequence – SRAM Read Access of a 5-byte Data Package
Figure 4-14. Exemplary SPI Sequence – SRAM Write Access of a 5-byte Data Package
4.4 PHY Status Information
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AT86RF212
As long as /SEL = L, every subsequent byte read or byte write increments the address
counter of the Frame Buffer until the SRAM access is terminated by /SEL = H.
Figure 4-13 and Figure 4-14 illustrate an exemplary SPI sequence of a SRAM access to
read and write a data package of 5-byte length, respectively.
Notes
• The SRAM access mode is not intended to be used as an alternative to the Frame
• Frame Buffer access violations are not indicated by a TRX_UR interrupt when using
Each SPI access can be configured to return status information of the radio transceiver
(PHY_STATUS) to the microcontroller using the first byte of the data transferred via MISO.
The content of the radio transceiver status information can be configured using register
bits SPI_CMD_MODE (register 0x04, TRX_CTRL_1). After reset, the content on the
first byte send on MISO to the microcontroller is set to 0x00.
Buffer access modes; refer to section 4.3.2.
the SRAM access mode; for further details refer to section 7.4.3.
8168C-MCU Wireless-02/10