AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 94

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.1.4.3 High Date Rate Mode Options
94
AT86RF212
Figure 7-2. High Date Rate Frame Structure
Due to the overhead caused by the PPDU header and the FCS, the effective data rate
is less than the selected data rate, depending on the length of the PSDU. A graphical
representation of the effective data rate is shown in Figure 7-3.
Figure 7-3. Effective Data Rate of the O-QPSK Modes
Consequently, high data rate transmission is useful for large PSDU lengths due to the
higher effective data rate, or in order to reduce the power consumption of the system.
Reduced Acknowledgment Time
If register bit AACK_ACK_TIME (register 0x17, XAH_CTRL_1) is set, the
acknowledgment time is reduced to the duration of 2 symbol periods for 200 and 400
kbit/s, and to 3 symbol periods for 500 and 1000 kbit/s, refer to Table 5-24. Otherwise, it
defaults to 12 symbol periods according to IEEE 802.15.4.
Receiver Sensitivity Control
The different data rates between PPDU header (SHR and PHR) and PHY payload
(PSDU) cause a different sensitivity between header and payload. This can be adjusted
by defining sensitivity threshold levels of the receiver. With a sensitivity threshold level
set, the AT86RF212 does not synchronize to frames with an RSSI level below that
threshold. Refer to section 7.2.3 for a configuration of the sensitivity threshold with
register 0x15 (RX_SYN).
900
800
700
600
500
400
300
200
100
0
0
250 kbit/s
500 kbit/s
20
1000 kbit/s
40
400 kbit/s
PSDU length in octets
Netto bit rate B
60
200 kbit/s
80
100 kbit/s
100
8168C-MCU Wireless-02/10
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