PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 139

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

13.2
The Timer1 oscillator may be used as the clock source
for Timer3. The Timer1 oscillator is enabled by setting
the T1OSCEN bit (T1CON Register). The oscillator is
a low power oscillator rated up to 200 kHz. Refer to
“Timer1 Module”, Section 11.0, for Timer1 oscillator
details.
13.3
The TMR3 register pair (TMR3H:TMR3L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR3 interrupt, if enabled, is generated on overflow,
which is latched in interrupt flag bit TMR3IF (PIE
registers). This interrupt can be enabled/disabled by
setting/clearing TMR3 interrupt enable bit TMR3IE
(PIE registers).
TABLE 13-1:
Legend:
INTCON
TMR3H
T1CON
T3CON
TMR3L
2001 Microchip Technology Inc.
Name
PIR2
PIE2
IPR2
Timer1 Oscillator
Timer3 Interrupt
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer3 module.
Holding register for the Least Significant Byte of the 16-bit TMR3 register
Holding register for the Most Significant Byte of the 16-bit TMR3 register
RD16
RD16
GIEH
Bit 7
GIE/
—
—
—
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
T3CCP2 T3CKPS1 T3CKPS0
PEIE/
GIEL
Bit 6
—
—
—
—
T1CKPS1 T1CKPS0 T1OSCEN
TMR0IE
Bit 5
—
—
—
INT0IE
Bit 4
—
—
—
Advance Information
T3CCP1
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
T1SYNC
T3SYNC
TMR0IF
LVDIF
LVDIE
LVDIP
13.4
If the CCP module is configured in Compare mode to
generate a “special event trigger" (CCP1M3:CCP1M0
= 1011), this signal will reset Timer3.
Timer3 must be configured for either Timer, or Synchro-
nized Counter mode, to take advantage of this feature. If
Timer3 is running in Asynchronous Counter mode, this
RESET operation may not work. In the event that a write
to Timer3 coincides with a special event trigger from
CCP1, the write will take precedence. In this mode of
operation,
becomes the period register for Timer3. Refer to
Section 14.0, “Capture/Compare/PWM (CCP) Modules”,
for CCP details.
Bit 2
Note:
TMR1CS TMR1ON 0-00 0000
TMR3CS TMR3ON 0000 0000
TMR3IE
TMR3IP
TMR3IF
Resetting Timer3 Using a CCP
Trigger Output
INT0IF
Bit 1
The special event triggers from the CCP
module will not set interrupt flag bit
TMR3IF (PIR registers).
the
PIC18C601/801
CCPR1H:CCPR1L
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0
0000 000x
---- 0000
---- 0000
---- 0000
xxxx xxxx
xxxx xxxx
Value on
POR,
BOR
DS39541A-page 139
registers
0000 000u
-0-- 0000
-0-- 0000
-0-- 0000
uuuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
Value on
RESETS
all other
pair