PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 312

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
Program Counter
Program Memory ............................................................... 39
Program Memory Map
Programming, Device Instructions ................................... 215
PUSH ............................................................................... 244
PWM (CCP Module) ........................................................ 146
Q
Q Clock ............................................................................ 146
R
RAM. See Data Memory
RCALL ............................................................................. 245
RCSTA Register
Reader Response ............................................................ 316
Register File ....................................................................... 49
Register File Summary ...................................................... 54
Registers
DS39541A-page 312
PCL Register ............................................................. 46
PCLATH Register ...................................................... 46
Boot Loader ............................................................... 43
Memory Map, PIC18C601
Memory Map, PIC18C801
PIC18C601 ................................................................ 40
PIC18C801 ................................................................ 40
Block Diagram ......................................................... 146
CCPR1H:CCPR1L Registers ................................... 146
Duty Cycle ............................................................... 146
Example Frequencies/Resolutions .......................... 147
Output Diagram ....................................................... 146
Period ...................................................................... 146
Registers Associated with PWM .............................. 147
Setup for PWM Operation ........................................ 147
TMR2 to PR2 Match ....................................... 135
SPEN Bit .................................................................. 177
ADCON0 (A/D Control 0) .......................................... 193
ADCON1 (A/D Control 1) ......................................... 194
CCP1CON and CCP2CON (CCP Control) .............. 141
CONFIG1H (Configuration Register 1 High) ............ 208
CONFIG2H (Configuration Register 2 High) ............ 209
CONFIG2L (Configuration Register 2 Low) ............. 208
CONFIG4L (Configuration Register 4 Low) ............. 209
CSEL2 (Chip Select 2) ............................................... 70
CSELIO (Chip Select I/O) .......................................... 70
INTCON (Interrupt Control) ........................................ 91
INTCON2 (Interrupt Control 2) ................................... 92
INTCON3 (Interrupt Control 3) ................................... 93
IPR (Interrupt Priority) ................................................ 99
LVDCON (LVD Control) ........................................... 204
MEMCON (Memory Control) ..................................... 63
OSCCON (Oscillator Control) .................................... 25
PIE (Peripheral Interrupt Enable) ............................... 97
PIR (Peripheral Interrupt Request) ............................ 95
PSPCON (PSP Control) ............................................ 50
RCON (Register Control) ........................................... 94
RCON (RESET Control) ..................................... 31
Program Bit Not Set ........................................... 40
Program Bit Set ................................................. 41
Program Bit Not Set ........................................... 40
Program Bit Set ................................................. 42
Program Bit Set ................................................. 41
Program Bit Set ................................................. 42
Advance Information
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146
62
RESET ............................................................. 29
RETFIE ............................................................................ 246
RETLW ............................................................................ 246
RETURN ......................................................................... 247
Revision History .............................................................. 303
RH3:RH0 Pins (I/O Mode) ............................................... 121
RH3:RH0 Pins (System Bus Mode) ................................ 122
RH7:RH4 Pins ................................................................. 121
RLCF ............................................................................... 247
RLNCF ............................................................................ 248
RRCF .............................................................................. 248
RRNCF ............................................................................ 249
S
Sales and Support ........................................................... 317
SCI. See USART
SCK ................................................................................. 153
SDI .................................................................................. 153
SDO ................................................................................. 153
Serial Clock, SCK ............................................................ 153
Serial Communication Interface. See USART
Serial Data In, SDI ........................................................... 153
Serial Data Out, SDO ...................................................... 153
Serial Peripheral Interface. See SPI
SETF ............................................................................... 249
Slave Select Synchronization .......................................... 156
Slave Select, SS .............................................................. 153
SLEEP ............................................................ 207
Software Simulator (MPLAB SIM) ................................... 260
Special Event Trigger. See Compare
Special Features of the CPU ........................................... 207
Special Function Register Map ......................................... 53
Special Function Registers ................................................ 49
SPI
SPI Module
SS .................................................................................... 153
RCSTA (Receive Status and Control) ..................... 178
SSPCON1 (SSP Control 1) ..................................... 151
SSPCON2 (SSP Control 2) ...................................... 152
SSPSTAT (SSP Status) .......................................... 150
STATUS .................................................................... 61
STKPTR (Stack Pointer) ........................................... 44
T0CON (Timer0 Control) ......................................... 127
T1CON (Timer1 Control) ......................................... 130
T2CON (Timer2 Control) ......................................... 135
T3CON (Timer3 Control) ......................................... 137
TXSTA (Transmit Status and Control) ..................... 177
WDTCON (Watchdog Timer Control) ...................... 210
Timing Diagram ....................................................... 280
Associated Registers ............................................... 158
Master Mode ........................................................... 155
Serial Clock ............................................................. 153
Serial Data In ........................................................... 153
Serial Data Out ........................................................ 153
Slave Select ............................................................ 153
SPI Clock ................................................................. 155
SPI Mode ................................................................. 153
Slave Mode ............................................................. 156
Slave Select Synchronization .................................. 156
Slave Synch Timing ................................................. 156
Slave Timing with CKE = 0 ...................................... 157
Slave Timing with CKE = 1 ...................................... 157
2001 Microchip Technology Inc.
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