PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 293

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

FIGURE 22-23:
TABLE 22-23: A/D CONVERSION REQUIREMENTS
Note 1: ADRES register may be read on the following T
Param
2001 Microchip Technology Inc.
No.
130
131
132
135
136
Note 1: If the A/D clock source is selected as RC, a time of T
2: See Section 17.0 for minimum conditions, when input voltage has changed more than 1 LSb.
3: The time for the holding capacitor to acquire the “New” input voltage, when the voltage changes full scale
4: On the next Q4 cycle of the device clock.
5: The time of the A/D clock period is dependent on the device frequency and the T
A/D DATA
SAMPLE
A/D CLK
ADRES
Symbol
BSF ADCON0, GO
T
after the conversion (AV
50 .
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
T
T
T
ADIF
T
SWC
CNV
ACQ
AMP
GO
AD
Q4
SLEEP instruction to be executed.
A/D clock period
Conversion time
(not including acquisition time)
Acquisition time
Switching time from convert
Amplifier settling time
132
A/D CONVERSION TIMING
(Note 2)
Characteristic
(3)
DD
9
to AV
(2)
PIC18C601/801
PIC18LC601/801
PIC18C601/801
PIC18LC601/801
SS
8
Advance Information
, or AV
OLD_DATA
(1)
7
sample
SS
to AV
. . .
SAMPLING STOPPED
CY
DD
cycle.
CY
. . .
). The source impedance (R
131
130
is added before the A/D clock starts.This allows the
Min
1.6
3.0
2.0
3.0
15
10
11
—
1
2
(Note 4)
20
20
Max
6.0
9.0
12
—
—
—
(5)
(5)
1
PIC18C601/801
Units
T
AD
s
s
s
s
s
s
s
T
T
A/D RC mode
A/D RC mode
-40 C
This may be used if the “new”
input voltage has not
changed by more than 1 LSb
(i.e., 5 mV @ 5.12V) from the
last sampled voltage (as
stated on C
0
OSC
OSC
0 C
S
AD
) on the input channels is
based, V
based, V
clock divider.
Temp
NEW_DATA
Temp
Conditions
DONE
DS39541A-page 293
HOLD
T
REF
REF
CY
125 C
125 C
).
full range
3.0V