PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 23

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

2.4
The EC oscillator mode requires an external clock
source to be connected to the OSC1 pin. The feedback
device between OSC1 and OSC2 is turned off in these
modes to save current. There is no oscillator start-up
time required after a Power-on Reset or after a
recovery from SLEEP mode.
In the EC oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 2-3 shows the pin connections for the EC
oscillator mode.
FIGURE 2-3:
FIGURE 2-4:
2001 Microchip Technology Inc.
Clock from
ext. system
External Clock Input
OSCOUT
OSCIN
F
OSC
/4
EXTERNAL CLOCK INPUT
OPERATION (EC OSC
CONFIGURATION)
PLL BLOCK DIAGRAM
Crystal
Osc
PLL Enable
OSC1
OSC2
HS Osc
F
PIC18C601/801
IN
Comparator
F
Phase
OUT
Advance Information
Loop
Filter
3
Feedback Divider
2.5
A Phase Lock Loop (PLL) circuit is provided as a soft-
ware programmable option for users that want to multi-
ply the frequency of the incoming crystal oscillator
signal by 4. For an input clock frequency of 6 MHz, the
internal clock frequency will be multiplied to 24 MHz.
This is useful for customers who are concerned with
EMI due to high frequency crystals.
The PLL is enabled by configuring HS oscillator mode
and setting the PLLEN bit in the OSCON register. If HS
oscillator mode is not selected, or PLLEN bit in
OSCCON register is clear, the PLL is not enabled and
the system clock will come directly from OSC1. HS
oscillator mode is the default for PIC18C601/801. In all
other modes, the PLLEN bit and the SCS1 bit are
forced to ‘0’.
A PLL lock timer is used to ensure that the PLL has
locked before device execution starts. The PLL lock
timer has a time-out, referred to as T
2
HS4 (PLL)
1
C
VCO
PIC18C601/801
0
VCO
DS39541A-page 23
PLL
.
SYSCLK