PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 45

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

4.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pop values
off the stack, without disturbing normal program execu-
tion, is a desirable option. To push the current PC value
onto the stack, a PUSH instruction can be executed.
This will increment the stack pointer and load the cur-
rent PC value onto the stack. TOSU, TOSH and TOSL
can then be modified to place a return address on the
stack.
The POP instruction discards the current TOS by decre-
menting the stack pointer. The previous value pushed
onto the stack then becomes the TOS value.
4.2.4
These RESETS are enabled/disabled by programming
the STVREN configuration bit in CONFIG4L register.
When the STVREN bit is disabled, a full or underflow
condition will set the appropriate STKFUL or STKUNF
bit, but not cause a RESET. When the STVREN bit is
enabled, a full or underflow will set the appropriate
STKFUL or STKUNF bit and then cause a RESET. The
STKFUL or STKUNF bits are only cleared by the user
software or a POR.
2001 Microchip Technology Inc.
PUSH AND POP INSTRUCTIONS
STACK FULL/UNDERFLOW RESETS
Advance Information
4.3
A “fast return” option is available for interrupts and calls.
A fast register stack is provided for the STATUS, WREG
and BSR registers, and is only one layer in depth. The
stack is not readable or writable and is loaded with the
current value of the corresponding register when the
processor vectors for an interrupt. The values in the fast
register stack are then loaded back into the working reg-
isters, if the fast return instruction is used to return
from the interrupt.
A low or high priority interrupt source will push values
into the stack registers. If both low and high priority
interrupts are enabled, the stack registers cannot be
used reliably for low priority interrupts. If a high priority
interrupt occurs while servicing a low priority interrupt,
the stack register values stored by the low priority
interrupt will be overwritten.
If high priority interrupts are not disabled during low pri-
ority interrupts, users must save the key registers in
software during a low priority interrupt.
If no interrupts are used, the fast register stack can be
used to restore the STATUS, WREG and BSR registers
at the end of a subroutine call. To use the fast register
stack for a subroutine call, a fast call instruction
must be executed.
Example 4-1 shows a source code example that uses
the fast register stack.
EXAMPLE 4-1:
CALL SUB1, FAST
SUB1
RETURN FAST
Fast Register Stack
PIC18C601/801
FAST REGISTER STACK
CODE EXAMPLE
;STATUS, WREG, BSR
;SAVED IN FAST REGISTER
;STACK
;RESTORE VALUES SAVED
;IN FAST REGISTER STACK
DS39541A-page 45