PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 186

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
FIGURE 16-5:
TABLE 16-7:
DS39541A-page 186
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
INTCON
RCREG
SPBRG
RCSTA
TXSTA
Name
PIR1
PIE1
IPR1
RX (pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
Note: This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word,
USART Receive Register
Baud Rate Generator Register
GIE/GIEH PEIE/GIEL TMR0IE
CSRC
SPEN
causing the OERR (overrun) bit to be set.
Bit 7
—
—
—
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
START
ASYNCHRONOUS RECEPTION
bit
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit0
bit1
SREN
TXEN
RCIE
RCIP
RCIF
Bit 5
Advance Information
INT0IE
CREN
SYNC
bit7/8
TXIF
TXIE
TXIP
Bit 4
STOP
bit
ADDEN
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
Word 1
RCREG
—
START
bit
TMR0IF
CCP1IF TMR2IF TMR1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
bit0
BRGH
FERR
Bit 2
INT0IF
OERR
TRMT
Bit 1
bit7/8 STOP
Word 2
RCREG
RX9D
TX9D
bit
RBIF
Bit 0
START
bit
2001 Microchip Technology Inc.
0000 000x
-000 0000
-000 0000
-000 0000
0000 -00x
0000 0000
0000 0010
0000 0000
Value on
POR,
BOR
bit7/8
STOP
0000 000u
-000 0000
-000 0000
-000 0000
0000 -00x
0000 0000
0000 0010
0000 0000
bit
Value on
RESETS
all other