PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 242

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS39541A-page 242
MULLW
Before Instruction
After Instruction
Decode
WREG
PRODH
PRODL
WREG
PRODH
PRODL
Q1
literal ’k’
Multiply Literal with WREG
[ label ]
0
(WREG) x k
None
An unsigned multiplication is
carried out between the contents
of WREG and the 8-bit literal ’k’.
The 16-bit result is placed in
PRODH:PRODL register pair.
PRODH contains the high byte.
WREG is unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this operation.
A zero result is possible but not
detected.
1
1
MULLW
Read
0000
Q2
=
=
=
=
=
=
k
255
0E2h
?
?
0E2h
0ADh
08h
C4h
MULLW
1101
Process
Data
Q3
PRODH:PRODL
kkkk
k
Advance Information
PRODH:
registers
PRODL
Write
Q4
kkkk
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
MULWF
Before Instruction
After Instruction
Decode
WREG
REG
PRODH
PRODL
WREG
REG
PRODH
PRODL
Q1
register ’f’
Multiply WREG with f
[ label ]
0
a
(WREG) x (f)
None
An unsigned multiplication is
carried out between the contents
of WREG and the register file
location ’f’. The 16-bit result is
stored in the PRODH:PRODL
register pair. PRODH contains
the high byte.
Both WREG and ’f’ are
unchanged.
None of the status flags are
affected.
Note that neither overflow nor
carry is possible in this operation.
A zero result is possible but not
detected. If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1
MULWF
Read
0000
Q2
=
=
=
=
=
=
=
=
f
[0,1]
2001 Microchip Technology Inc.
255
0C4h
0B5h
?
?
0C4h
0B5h
8Ah
94h
REG
MULWF
001a
Process
Data
Q3
PRODH:PRODL
ffff
f [,a]
PRODH:
registers
PRODL
Write
Q4
ffff