PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 35

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

TABLE 3-3:
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition,
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
POSTDEC2
POSTINC2
2001 Microchip Technology Inc.
CCP1CON
SSPCON1
SSPCON2
WDTCON
PREINC2
OSCCON
SSPSTAT
PLUSW2
LVDCON
ADRESH
ADCON0
ADCON1
ADCON2
CCPR1H
Register
SSPBUF
SSPADD
ADRESL
CCPR1L
STATUS
RCON
TMR0H
T0CON
TMR1H
T1CON
T2CON
FSR2H
TMR0L
TMR1L
FSR2L
TMR2
PR2
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH, and TOSL are
4: See Table 3-2 for RESET value for specific condition.
5: This is not a physical register. It is an indirect pointer that addresses another register. The contents
r = reserved, maintain ‘0’
(4)
vector (00008h or 00018h).
updated with the current value of the PC. The SKPTR is modified to point to the next location in the
hardware stack.
returned is the value contained in the addressed register.
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
601
Applicable
Devices
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
801
Power-on Reset
---- 0000
xxxx xxxx
---x xxxx
xxxx xxxx
xxxx xxxx
1111 1111
--00 0-00
--00 0101
---- 1111
0r-1 11qr
xxxx xxxx
xxxx xxxx
0-00 0000
xxxx xxxx
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
-000 0000
0--- -000
xxxx xxxx
xxxx xxxx
--00 0000
(Note 5)
(Note 5)
(Note 5)
(Note 5)
Advance Information
Stack Over/Underflow Reset
Reset Instruction
MCLR Reset
---- 0000
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
1111 1111
--uu u-u0
--00 0101
---- uuuu
0r-1 qqur
uuuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
-000 0000
0--- -000
uuuu uuuu
uuuu uuuu
--00 0000
WDT Reset
(Note 5)
(Note 5)
(Note 5)
(Note 5)
PIC18C601/801
Wake-up via WDT or
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu u-uu
--uu uuuu
---- uuuu
ur-u qqur
uuuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
1111 1111
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
-uuu uuuu
u--- -uuu
uuuu uuuu
uuuu uuuu
--uu uuuu
Interrupt
(Note 5)
(Note 5)
(Note 5)
(Note 5)
DS39541A-page 35