PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 286

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
FIGURE 22-16:
TABLE 22-15: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
DS39541A-page 286
Param
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1: Requires the use of parameter # 73A.
No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
Note: Refer to Figure 22-4 for load conditions.
2: Only if parameter #s 71A and 72A are used.
TssL2scH,
TssL2scL
TscH
TscL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS to SDO output hi-impedance
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
Symbol
B
2
B
SS to SCK or SCK input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Last clock edge of Byte1 to the 1st clock edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK
edge
SDO data output valid after SS
edge
SS
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
after SCK edge
MSb In
MSb
74
71
75, 76
Characteristic
72
Advance Information
Bit6 - - - - - -1
Bit6 - - - -1
PIC18C601/801
PIC18C601/801
PIC18LC601/801
Continuous
Single Byte
Continuous
Single Byte
PIC18LC601/801
PIC18C601/801
PIC18LC601/801
PIC18C601/801
PIC18LC601/901
80
LSb
LSb In
1.25T
1.25T
1.5T
1.5T
Min
100
T
CY
CY
40
40
10
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
2001 Microchip Technology Inc.
77
Max Units Conditions
100
100
25
45
25
50
25
45
25
50
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)