NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 20

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

Intel
2.3.
2.4.
20
®
82810E (GMCH)
Display Cache Interface Signals
Hub Interface Signals
LMD[31:0]
LCS#
LDQM[3:0]
LSRAS#
LSCAS#
LMA[11:0]
LWE#
HL[10:0]
HLSTRB
HLSTRB#
HUBREF
HCOMP
Signal Name
Signal Name
O
CMOS
O
CMOS
O
CMOS
O
CMOS
O
CMOS
O
CMOS
I/O
CMOS
I/O
I/O
I/O
I
Ref
I/O
Type
Type
Chip Select: For the memory row configured with SDRAM, these pins perform the
function of selecting the particular SDRAM components during the active state.
Input/Output Data Mask: These pins control the memory array and act as
synchronized output enables during read cycles and as a byte enables during write
cycles.
SDRAM Row Address Strobe: The LSRAS# signal is used to generate SDRAM
Command encoded on LSRAS#/LSCAS#/LWE# signals. When LRAS# is sampled
active at the rising edge of the SDRAM clock, the row address is latched into the
SDRAMs.
SDRAM Column Address Strobe: The LSCAS# signal is used to generate
SDRAM Command encoded on LSRAS#/LSCAS#/LWE# signals. When LSCAS# is
sampled active at the rising edge of the SDRAM clock, the column address is
latched into the SDRAMs.
Memory Address: LMA[11:0] is used to provide the multiplexed row and column
address to DRAM.
Write Enable Signal: LWE# is asserted during writes to DRAM.
Memory Data: These signals are used to interface to the DRAM data bus of DRAM
array.
Hub Interface Signals: Signals used for the hub interface.
Packet Strobe: One of two differential strobe signals used to transmit or receive
packet data.
Packet Strobe Compliment: One of two differential strobe signals used to transmit
or receive packet data.
HUB reference: Sets the differential voltage reference for the hub interface.
Hub Compensation Pad: Used to calibrate the hub interface buffers.
Description
Description
Datasheet
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