NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 89

no-image

NH82810 S L7XK

Manufacturer Part Number
NH82810 S L7XK
Description
Manufacturer
Intel
Datasheet

Specifications of NH82810 S L7XK

Lead Free Status / RoHS Status
Compliant
4.6.
4.6.1.
Datasheet
Figure 8. 3D/2D Pipeline Preprocessor
R
3D/2D Instruction Processing
Internal Graphics Device
The GMCH contains an extensive set of instructions that control various functions including 3D
rendering, BLT and STRBLT operations, display, motion compensation, and overlay. The 3D
instructions set 3D pipeline states and control the processing functions. The 2D instructions provide an
efficient method for invoking BLT and STRBLT operations.
The graphics controller executes instructions from one of two instruction buffers located in either system
memory or the display cache: Interrupt Ring or Low Priority Ring. Instead of writing instructions directly
to the GMCH’s graphics controller, software sets up instruction packets in these memory buffers and
then instructs the GMCH to process the buffers. The GMCH uses DMAs to put the instructions into its
FIFO and executes them. Instruction flow in the ring buffer instruction stream can make calls to other
buffers, much like a software program makes subroutine calls. Flexibility has been built into the ring
operation permitting software to efficiently maintain a steady flow of instructions.
Batching instructions in memory ahead of time and then instructing the graphics controller to process the
instructions provides significant performance advantages over writing directly to FIFOs including: 1)
Reduced software overhead, 2) Efficient DMA instruction fetches from graphics memory, and 3)
Software can more efficiently set up instruction packets in buffers in graphics memory (faster than
writing to FIFOs).
Batch Buffers
Batch Buffers
(Graphics Memory)
(Graphics Memory)
Low Priority Ring
Interrupt Ring
Batch Buff Instr
Batch Buff Instr
Instruction
Instruction
Instruction
Instruction
DMA
DMA
Instruction access and decoding
FIFO
DMA
Parser
Instr
3D Instructions (3D state,
3D Primitives, STRBLT,
Motion Compensation)
2D Instructions
Intel
®
82810E (GMCH)
Display
Overlay
Engine
Engine
Engine
Engine
cmd_str.vsd
BLT
3D
89

Related parts for NH82810 S L7XK