NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 4

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

Intel
4.
4
®
82810E (GMCH)
3.5.
3.6.
3.7.
Functional Description................................................................................................................ 69
4.1.
3.4.12.
3.4.13.
3.4.14.
3.4.15.
3.4.16.
3.4.17.
3.4.18.
3.4.19.
3.4.20.
3.4.21.
Graphics Device Registers (Device 1)........................................................................... 49
3.5.1.
3.5.2.
3.5.3.
3.5.4.
3.5.5.
3.5.6.
3.5.7.
3.5.8.
3.5.9.
3.5.10.
3.5.11.
3.5.12.
3.5.13.
3.5.14.
3.5.15.
3.5.16.
3.5.17.
3.5.18.
3.5.19.
3.5.20.
3.5.21.
3.5.22.
3.5.23.
3.5.24.
3.5.25.
Display Cache Interface................................................................................................. 62
3.6.1.
3.6.2.
3.6.3.
Display Cache Detect and Diagnostic Registers ........................................................... 65
3.7.1.
3.7.2.
3.7.3.
3.7.4.
3.7.5.
System Address Map .................................................................................................... 69
4.1.1.
4.1.1.1.
4.1.1.2.
CAPPTR    Capabilities Pointer (Device 0) .................................................. 36
PAMR—Programmable Attributes Register (Device 0)............................... 38
DRPDRAM Row Population Register (Device 0)..................................... 39
DRAMTDRAM Timing Register (Device 0).............................................. 41
FCHCFixed DRAM Hole Control Register (Device 0).............................. 42
SMRAMSystem Management RAM Control Register (Device 0) ........... 43
MISCCMiscellaneous Control Register (Device 0) .................................. 45
MISCC2Miscellaneous Control 2 Register (Device 0) ............................. 46
BUFF_SC—System Memory Buffer Strength Control Register (Device 0). 47
VIDVendor Identification Register (Device 1) .......................................... 50
DIDDevice Identification Register (Device 1)........................................... 50
PCICMDPCI Command Register (Device 1) ........................................... 51
PCISTSPCI Status Register (Device 1) ................................................... 52
RIDRevision Identification Register (Device 1) ........................................ 53
PI-Programming Interface Register (Device 1) ........................................... 53
SUBC1—Sub-Class Code Register (Device 1) ........................................... 53
BCC1—Base Class Code Register (Device 1)............................................ 54
CLSCache Line Size Register (Device 1) ................................................ 54
MLTMaster Latency Timer Register (Device 1) ....................................... 54
HDRHeader Type Register (Device 1)..................................................... 55
BISTBuilt In Self Test (BIST) Register (Device 1) ................................... 55
GMADRGraphics Memory Range Address Register (Device 1) ............. 56
MMADRMemory Mapped Range Address Register (Device 1)............... 57
SVIDSubsystem Vendor Identification Register (Device 1) ..................... 57
SIDSubsystem Identification Register (Device 1) .................................... 58
ROMADRVideo BIOS ROM Base Address Registers (Device 1)........... 58
CAPPOINTCapabilities Pointer Register (Device 1)................................ 58
INTRLINEInterrupt Line Register (Device 1) ........................................... 59
INTRPINInterrupt Pin Register (Device 1) ............................................... 59
MINGNTMinimum Grant Register (Device 1) .......................................... 59
MAXLATMaximum Latency Register (Device 1) ..................................... 59
PM_CAPIDPower Management Capabilities ID Register (Device 1) ...... 60
PM_CAPPower Management Capabilities Register (Device 1)............... 60
PM_CS—Power Management Control/Status Register (Device 1)............ 61
DRT—DRAM Row Type.............................................................................. 62
DRAMCL—DRAM Control Low ................................................................... 63
DRAMCH—DRAM Control High.................................................................. 64
GRXGRX Graphics Controller Index Register ......................................... 65
MSRMiscellaneous Output ...................................................................... 66
GR06Miscellaneous Register .................................................................. 67
GR10Address Mapping............................................................................ 68
GR11Page Selector ................................................................................. 68
Memory Address Ranges ............................................................................ 70
GMCHCFG    GMCH Configuration Register (Device 0) ............................. 37
Compatibility Area........................................................................... 71
Extended Memory Area .................................................................. 73
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