NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 56

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

Intel
3.5.13.
56
®
82810E (GMCH)
GMADR    Graphics Memory Range Address Register (Device 1)
Address Offset:
Default Value:
Access:
This register requests allocation for the internal graphics device of the GMCH local memory. The
allocation is for either 32 MB or 64 MB of memory space (selected by bit 0 of the Device 0 MISCC
Register) and the base address is defined by bits [31:25,24].
31:26
31
15
24:4
2:1
Bit
25
3
0
Memory Base Address
Memory Base Address    R/W. Set by the OS, these bits correspond to address signals [31:26].
64M Address Mask—RO , R/W. If Device 0 MISCC Reg bit 0 = 0 then this bit is Read Only with a
value of “0”, indicating a memory range of 64MB, if Device 0 MISCC Reg bit 0 = 1 then this bit is R/W,
indicating a memory range of 32 MB.
Address Mask    RO. Hardwired to 0s to indicate 32 MB address range.
Prefetchable Memory    RO. Hardwired to 1 to enable prefetching.
Memory Type    RO. Hardwired to 0 to indicate 32-bit address.
Memory/IO Space    RO. Hardwired to 0 to indicate memory space.
(addr bits [31:26])
(HW=0; 32MB addr range)
Address Mask (cont)
26
10−13h
00000008h
Read/Write, Read Only
Addr Mask
64 MB
25
4
Descriptions
24
Prefetch
Mem En
(HW=1)
3
Address Mask (HW=0; 32MB addr range)
2
(HW=0; 32MB addr)
Memory Type
1
Mem/IO
(HW=0)
Space
Datasheet
0
16
R