NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 44

• Manufacturer Part Number: NH82810 S L7XK
• Manufacturer: Intel

Specifications of NH82810 S L7XK

• Lead Free Status / RoHS Status: Compliant

Intel
44
®
82810E (GMCH)
Bit
3:2
1
0
01 = AB segment enabled as General System RAM
Lower SMM Select ( LSMM ). This field controls the definition of the A&B segment SMM space
When D_LCK is set bit 3 becomes Read_Only, and bit 2 is Writable ONLY if bit 3 is a “1”.
SMM Space Locked (D_LCK). When D_LCK is set to 1 then D_LCK, GMS, USMM, and the most
significant bit of LSMM become read only. D_LCK can be set to 1 via a normal configuration space write
but can only be cleared by a power-on reset. The combination of D_LCK and LSMM provide
convenience with security. The BIOS can use LSMM=01 to initialize SMM space and then use D_LCK to
“lock down” SMM space in the future so that no application software (or BIOS itself) can violate the
integrity of SMM space, even if the program has knowledge of the LSMM function. This bit also Locks
the DRP register.
E_SMRAM_ERR (E_SMERR). This bit is set when processor accesses the defined memory ranges in
Extended SMRAM (HSEG or TSEG) while not in SMM mode. It is the software’s responsibility to clear
this bit. The software must write a 1 to this bit to clear it This bit is Not set for the case of an Explicit
Write Back operation.
00 = AB segment disabled
10 = AB segment enabled as SMM Code RAM Shadow. Only SMM Code Reads can access DRAM in
the AB segment, SMM Data operations and all Non-SMM Operations go to either the internal
Graphics Device or are broadcast on hub interface. 11 = AB segment Enabled as SMM RAM. All
SMM operations to the AB segment are serviced by DRAM, all Non-SMM Operations go to either
the internal Graphics Device or are broadcast on hub interface.
Description
Datasheet
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