NH82810 S L7XK Intel, NH82810 S L7XK Datasheet - Page 45
NH82810 S L7XK
Manufacturer Part Number
NH82810 S L7XK
Description
Manufacturer
Intel
Datasheet
1.NH82810_S_L7XK.pdf
(119 pages)
Specifications of NH82810 S L7XK
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3.4.19.
Datasheet
R
MISCC Miscellaneous Control Register (Device 0)
Address Offset:
Default Value:
Access:
This register contain miscellaneous control bits for the GMCH. Bits[7:3] are locked (read-only) when
MISCC[P_CLK; bit 3] = 1.
15:8
15
7
7:6
5:4
2:1
Bit
3
0
Read Power Throttle
Control
Reserved
Read Power Throttle Control. These bits select the Power Throttle Bandwidth Limits for Read
operations to System Memory.
00 = No Limit (Default)
01 = Limit at 87 ½ %
10 = Limit at 75 %
11 = Limit at 62 ½ %
Write Power Throttle Control. These bits select the Power Throttle Bandwidth Limits for Write
operations to System Memory.
00 = No Limit (Default)
01 = Limit at 62.5%
10 = Limit at 50%
11 = Limit at 37.5%
Power Throttle Lock (P_LCK).
Reserved.
Graphics Display Cache Window Size Select.
0 = 64 MB (default)
1 = 32 MB. See GMADR Register (Device 1).
1 = Locked. Bits 7:3 of the MISCC register are read-only. Once this bit is set to 1, it can only be
0 = Not locked.
cleared to 0 by a hardware reset.
6
5
Write Power Throttle
Control
72–73h
0000h
Read/Write
Reserved
4
Description
3
Reserved
Intel
®
82810E (GMCH)
1
GFX Local
Mem Win
Size Sel
0
8
45
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