ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 192

• Manufacturer Part Number: ATmega16U2
• Manufacturer: Atmel Corporation

Specifications of ATmega16U2

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.5.3
20.6
7799D–AVR–11/10
Memory management
Freeze clock
EPEN=1
ALLOC=1
The firmware has the ability to freeze the clock of USB controller by setting the FRZCLK bit, and
thereby reduce the power consumption. When FRZCLK is set, it is still possible to access to the
following registers:
When FRZCLK is set, only the asynchronous interrupt may be triggered:
The controller does only support the following memory allocation management.
The reservation of an Endpoint can only be made in the increasing order (Endpoint 0 to the last
Endpoint). The firmware shall thus configure them in the same order.
The reservation of an Endpoint k
cates the memory and insert it between the Endpoints k
“slides” up and its data is lost. Note that the k
Clearing an Endpoint enable (EPEN) does not clear either its ALLOC bit, or its configuration
(EPSIZE/PSIZE, EPBK/PBK). To free its memory, the firmware should clear ALLOC. Then, the
k
does not slide.
The following figure illustrates the allocation and reorganization of the USB memory in a typical
example:
Table 20-1.
i+1
Free memory
• USBCON
• DPRAM direct access registers (DPADD7:0, UEDATX)
• UDCON
• UDINT
• UDIEN
• WAKEUPI
Endpoints
activation
Endpoint memory automatically slides down. Note that the k
4
3
2
1
0
Allocation and reorganization USB memory flow
Endpoint Disable
Free memory
(ALLOC=1)
EPEN=0
4
3
1
0
i
is done when its ALLOC bit is set. Then, the hardware allo-
i+2
Free its memory
Free memory
Lost memory
(ALLOC=0)
and upper Endpoint memory does not slide.
ATmega8U2/16U2/32U2
4
3
1
0
i-1
and k
i+2
i+1
and upper Endpoint memory
. The k
2 (bigger size)
Free memory
Activatation
Endpoint
3
1
0
4
i+1
Endpoint memory
Conflict
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