ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 218

• Manufacturer Part Number: ATmega16U2
• Manufacturer: Atmel Corporation

Specifications of ATmega16U2

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

21.18.14 UESTA1X – USB Endpoint Status 1 Register
7799D–AVR–11/10
• Bit 1:0 – NBUSYBK[1:0]: Busy Bank Flag
These flags are set by hardware to indicate the number of busy bank for the selected endpoint
as shown in
For IN endpoint, it indicates the number of busy bank(s), filled by the user, ready for IN transfer.
For OUT endpoint, it indicates the number of busy bank(s) filled by OUT transaction from the
host.
Table 21-6.
• Bits 7:3 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 2 – CTRLDIR: Control Direction
This flag is updated by the USB controller when a SETUP packet has been received. This flag
bit can be used for debug purpose to give the direction of the following packet. Reading one
from this flag means that the following packet is for an IN request, reading zero for an OUT
request.
• Bits 1:0 – CURRBK[1:0]: Current Bank
These flags are set by hardware to indicate the current bank number in used with the selected
endpoint as shown in
point can not be configured in dual bank mode).These flags can be used for debug purpose and
are optional for data transfer with endpoint in dual bank mode.
Table 21-7.
Bit
(0xEF)
Read/Write
Initial Value
NBUSYBK1
CURRBK1
0
0
1
1
0
0
1
1
Table
R
7
0
-
NBUSYBK[1:0] Bits Settings
CURRBK[1:0] Bits Settings
21-6.
Table
R
6
0
-
21-6. These flags are not relevant for control endpoint (control end-
NBUSYBK0
CURRBK0
R
5
0
-
0
1
0
1
0
1
0
1
R
4
0
-
Number of busy banks
All banks are free
1 busy bank
2 busy banks
Reserved
Current Bank Number
Bank 0
Bank 1
Reserved
ATmega8U2/16U2/32U2
R
3
0
-
CTRLDIR
R
2
0
R
1
0
CURRBK[1:0]
0
0
UESTA1X
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