ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 95

• Manufacturer Part Number: ATmega16U2
• Manufacturer: Atmel Corporation

Specifications of ATmega16U2

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

15.6
7799D–AVR–11/10
Compare Match Output Unit
generation. Similarly, do not write the TCNT0 value equal to BOTTOM when the counter is
down-counting.
The setup of the OC0x should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC0x value is to use the Force Output Com-
pare (FOC0x) strobe bits in Normal mode. The OC0x Registers keep their values even when
changing between Waveform Generation modes.
Be aware that the COM0x[1:0] bits are not double buffered together with the compare value.
Changing the COM0x[1:0] bits will take effect immediately.
The Compare Output mode (COM0x[1:0]) bits have two functions. The Waveform Generator
uses the COM0x[1:0] bits for defining the Output Compare (OC0x) state at the next Compare
Match. Also, the COM0x[1:0] bits control the OC0x pin output source.
plified schematic of the logic affected by the COM0x[1:0] bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-
ters (DDR and PORT) that are affected by the COM0x[1:0] bits are shown. When referring to the
OC0x state, the reference is for the internal OC0x Register, not the OC0x pin. If a system reset
occur, the OC0x Register is reset to “0”.
Figure 15-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the out-
put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
operation.
See “Register Description” on page 102.
COMnx1
COMnx0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCnx
Q
Q
Q
ATmega8U2/16U2/32U2
1
0
Figure 15-4
OCnx
Pin
shows a sim-
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