ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 7

no-image

ATmega16U2

Manufacturer Part Number
ATmega16U2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16U2

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16U2
Manufacturer:
ATMEL
Quantity:
853
Part Number:
ATMEGA16U2
Manufacturer:
ST
0
Part Number:
ATmega16U2-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega16U2-MU
Manufacturer:
RALINK
Quantity:
2 400
Company:
Part Number:
ATmega16U2-MU
Quantity:
250
6. AVR CPU Core
6.1
6.2
7799D–AVR–11/10
Introduction
Architectural Overview
This section discusses the AVR core architecture in general. The main function of the CPU core
is to ensure correct program execution. The CPU must therefore be able to access memories,
perform calculations, control peripherals, and handle interrupts.
Figure 6-1.
In order to maximize performance and parallelism, the AVR uses a Harvard architecture – with
separate memories and buses for program and data. Instructions in the program memory are
executed with a single level pipelining. While one instruction is being executed, the next instruc-
tion is pre-fetched from the program memory. This concept enables instructions to be executed
in every clock cycle. The program memory is In-System Reprogrammable Flash memory.
Control Lines
Instruction
Instruction
Program
Memory
Block Diagram of the AVR Architecture
Register
Decoder
Flash
Program
Counter
ATmega8U2/16U2/32U2
and Control
EEPROM
Registrers
I/O Lines
Purpose
General
SRAM
Data Bus 8-bit
Status
32 x 8
Data
ALU
I/O Module 2
Comparator
I/O Module1
I/O Module n
Watchdog
Interrupt
Timer
Analog
Unit
Unit
SPI
7

Related parts for ATmega16U2