ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 213

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ATmega16U2

Manufacturer Part Number
ATmega16U2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16U2

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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21.18.5
21.18.6
21.18.7
7799D–AVR–11/10
UDFNUMH – USB Device Frame Number High Register
UDFNUML – USB Device Frame Number Low Register
UDMFN – USB Device Micro Frame Number
• Bits 7:3 – Res: Reserved
These bits are reserved and will always read as zero.
• Bits 2:0 – FNUM[10:8]: Frame Number Upper Flag
These bits are read-only and updated by the hardware USB controller. These bits contains the 3
MSB of the 11-bits Frame Number information. The content of these bits is updated with the last
received SOF packet. These bits are updated even if a corrupted SOF has been received. When
a corrupted SOF number is detected, the FNCERR bit of UDMFN is set.
• Bits 7:0 – FNUM: Frame Number Lower Flag
These bits are read-only and updated by the hardware USB controller. These bits contains the 8
LSB of the 11-bits Frame Number information. The content of these bits is updated with the last
received SOF packet. These bits are updated even if a corrupted SOF has been received. When
a corrupted SOF number is detected, the FNCERR bit of UDMFN is set.
• Bit 7:5 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 4 – FNCERR: Frame Number CRC Error Flag
This bit is set by the USB controller when a corrupted frame number in Start of frame packet is
received. When an incorrect frame number is detected both SOFI flag and this bit are set.
• Bits 3:0 – Res: Reserved
These bits are reserved and will always read as zero.
Bit
(0xE5)
Read/Write
Initial Value
Bit
(0xE4)
Read/Write
Initial Value
Bit
(0xE6)
Read/Write
Initial Value
R
7
0
-
R
7
0
R
7
0
-
R
6
0
-
R
R
6
0
6
0
-
R
R
5
0
5
0
-
R
5
0
-
FNCERR
R/W
R
4
0
-
R
4
0
4
0
FNUM[7:0]
ATmega8U2/16U2/32U2
R
3
0
R
-
R
3
0
3
0
-
R
2
0
R
R
2
0
2
0
-
FNUM[10:8]
R
R
R
1
0
1
0
1
0
-
R
R
R
0
0
0
0
0
0
-
UDFNUMH
UDFNUML
UDMFN
213

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