ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 45

• Manufacturer Part Number: ATmega16U2
• Manufacturer: Atmel Corporation

Specifications of ATmega16U2

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

9.9.6
9.10
9.10.1
7799D–AVR–11/10
Register Description
On-chip Debug System
SMCR – Sleep Mode Control Register
enabled and the input signal is left floating or have an analog signal level close to V
input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1). Refer to
“DIDR1 – Digital Input Disable Register 1” on page 225
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enters sleep mode,
the main clock source is enabled, and hence, always consumes power. In the deeper sleep
modes, this will contribute significantly to the total current consumption.
The Sleep Mode Control Register contains control bits for power management.
• Bit 7:4 - Reserved bits
These bits are reserved and will always read as zero.
• Bits 3:1 – SM[2:0]: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 9-2.
Note:
• Bit 0– SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bit
0x33 (0x53)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby modes are only recommended for use with external crystals or resonators.
Sleep Mode Select
CC
R
7
–
0
/2 on an input pin can cause significant current even in active mode. Digital
SM1
0
0
1
1
0
0
1
1
R
6
–
0
R
5
–
0
SM0
0
1
0
1
0
1
0
1
R
4
–
0
Sleep Mode
Idle
Reserved
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
ATmega8U2/16U2/32U2
SM2
R/W
3
0
(1)
for details.
SM1
R/W
2
0
(1)
SM0
R/W
Table
1
0
9-2.
R/W
SE
0
0
SMCR
CC
/2, the
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