ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 87
ATmega16U2
Manufacturer Part Number
ATmega16U2
Description
Manufacturer
Atmel Corporation
Specifications of ATmega16U2
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA16U2
Manufacturer:
ATMEL
Quantity:
853
Company:
Part Number:
ATmega16U2-MU
Manufacturer:
RALINK
Quantity:
2 400
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13.2.7
13.2.8
7799D–AVR–11/10
PCMSK0 – Pin Change Mask Register 0
PCMSK1 – Pin Change Mask Register 1
• Bit 1:0 – PCIF[1:0]: Pin Change Interrupt Flag 1:0
When a logic change on any PCINT[12:8]/[7:0] pin triggers an interrupt request, PCIF1/0
becomes set (one). If the I-bit in SREG and the PCIE1/0 bit in EIMSK are set (one), the MCU will
jump to the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is exe-
cuted. Alternatively, the flag can be cleared by writing a logical one to it.
• Bit 7:0 – PCINT[7:0]: Pin Change Enable Mask 7:0
Each PCINT[7:0] bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT[7:0] is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT[7:0] is cleared, pin change interrupt on the corresponding I/O
pin is disabled.
• Bit 4:0 – PCINT[12:8]: Pin Change Enable Mask 12:8
Each PCINT[12:8] bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT[12:8] is set and the PCIE1 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT[12:8] is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
Bit
(0x6B)
Read/Write
Initial Value
Bit
(0x6C)
Read/Write
Initial Value
PCINT7
R/W
R
7
0
7
0
-
PCINT6
R/W
R
6
0
6
0
-
PCINT5
R/W
R/W
5
0
5
0
-
PCINT12
PCINT4
R/W
R/W
4
0
4
0
PCINT11
PCINT3
ATmega8U2/16U2/32U2
R/W
R/W
3
0
3
0
PCINT10
PCINT2
R/W
R/W
2
0
2
0
PCINT1
PCINT9
R/W
R/W
1
0
1
0
PCINT8
PCINT0
R/W
R/W
0
0
0
0
PCMSK0
PCMSK1
87
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