ATmega16U2 Atmel Corporation, ATmega16U2 Datasheet - Page 225

• Manufacturer Part Number: ATmega16U2
• Manufacturer: Atmel Corporation

Specifications of ATmega16U2

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

22.2.2
22.2.3
7799D–AVR–11/10
ACMUX – Analog Comparator Input Multiplexer
DIDR1 – Digital Input Disable Register 1
Table 22-1.
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when the
bits are changed.
• Bit 2, 0 – CMUX2:0: Analog Comparator Selection Bits
The value of these bits selects which combination of analog inputs are connected to the analog
comparator.
The different settings are shown in
Table 22-2.
• Bit 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AINx pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be writ-
ten logic one to reduce power consumption in the digital input buffer.
Bit
(0x7D)
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CMUX2
ACIS1
0
0
1
1
0
0
0
0
1
1
1
1
ACIS1/ACIS0 Settings
CMUX2:0 Settings
R
CMUX1
R
7
–
0
7
–
0
ACIS0
0
1
0
1
0
0
1
1
0
0
1
1
AIN6D
R/W
R
6
–
0
6
0
Interrupt Mode
Comparator Interrupt on Output Toggle.
Reserved
Comparator Interrupt on Falling Output Edge.
Comparator Interrupt on Rising Output Edge.
CMUX0
AIN5D
0
1
0
1
0
1
0
1
R/W
Table
R
5
–
0
5
0
22-2.
AIN4D
Comparator Input
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
Reserved
Reserved
R/W
R
4
–
0
4
0
ATmega8U2/16U2/32U2
AIN3D
R/W
R
3
–
0
3
0
CMUX2
AIN2D
R/W
R/W
2
0
2
0
CMUX1
AIN1D
R/W
R/W
1
0
1
0
CMUX0
AIN0D
R/W
R/W
0
0
0
0
ACMUX
DIDR1
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