SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 855

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
6254C–ATARM–22-Jan-10
25 Error Corrected Code Controller (ECC) ............................................. 261
26 Peripheral DMA Controller (PDC) ....................................................... 303
27 Clock Generator ................................................................................... 315
28 Power Management Controller (PMC) ................................................ 320
24.5 Functional Description ......................................................................................244
24.6 SDRAM Controller (SDRAMC) User Interface .................................................251
25.1 Description .......................................................................................................261
25.2 Block Diagram ..................................................................................................261
25.3 Functional Description ......................................................................................261
25.4 Error Corrected Code Controller (ECC) User Interface ....................................266
25.5 Registers for 1 ECC for a page of 512/1024/2048/4096 bytes ........................277
25.6 Registers for 1 ECC per 512 bytes for a page of 512/2048/4096 bytes,
25.7 Registers for 1 ECC per 256 bytes for a page of 512/2048/4096 bytes,
26.1 Description .......................................................................................................303
26.2 Block Diagram ..................................................................................................304
26.3 Functional Description ......................................................................................304
26.4 Peripheral DMA Controller (PDC) User Interface .............................................307
27.1 Description .......................................................................................................315
27.2 Clock Generator Block Diagram .......................................................................315
27.3 Slow Clock Crystal Oscillator ...........................................................................315
27.4 Slow Clock RC Oscillator .................................................................................316
27.5 Slow Clock Selection ........................................................................................316
27.6 Main Oscillator .................................................................................................316
27.7 Divider and PLL Block ......................................................................................318
28.1 Description .......................................................................................................320
28.2 Master Clock Controller ....................................................................................321
28.3 Processor Clock Controller ..............................................................................321
28.4 USB Clock Controller .......................................................................................322
28.5 Peripheral Clock Controller ..............................................................................322
28.6 Programmable Clock Output Controller ...........................................................322
28.7 Programming Sequence ..................................................................................323
28.8 Clock Switching Details ....................................................................................328
28.9 Power Management Controller (PMC) User Interface ....................................332
8-bit word .......................................................................................................279
8-bit word .......................................................................................................287
AT91SAM9XE128/256/512 Preliminary
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