SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 87

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SAM9XE512

Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9XE512

Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
14.2.3
14.2.4
14.2.4.1
6254C–ATARM–22-Jan-10
Entering Programming Mode
Programmer Handshaking
Write Handshaking
Table 14-3.
The following algorithm puts the device in Parallel Programming Mode:
Note:
An handshake is defined for read and write operations. When the device is ready to start a new
operation (RDY signal set), the programmer starts the handshake by clearing the NCMD signal.
The handshaking is achieved once NCMD signal is high and RDY is high.
For details on the write handshaking sequence, refer to
DATA[15:0]
0x0011
0x0012
0x0022
0x0032
0x0042
0x0013
0x0014
0x0024
0x0015
0x0034
0x0044
0x0025
0x0054
0x0035
0x001F
0x001E
• Apply GND, VDDIO, VDDCORE and VDDPLL.
• Apply XIN clock within T
• Wait for T
• Start a read or write handshaking.
After reset, the device is clocked by the internal RC oscillator. Before clearing RDY signal, if an
external clock ( > 32 kHz) is connected to XIN, then the device switches on the external clock.
Else, XIN input is not considered. A higher frequency on XIN speeds up the programmer
handshake.
POR_RESET
Command Bit Coding
Symbol
READ
WP
WPL
EWP
EWPL
EA
SLB
CLB
GLB
SGPB
CGPB
GGPB
SSE
WRAM
GSE
GVE
AT91SAM9XE128/256/512 Preliminary
POR_RESET
if an external clock is available.
Command Executed
Read Flash
Write Page Flash
Write Page and Lock Flash
Erase Page and Write Page
Erase Page and Write Page then Lock
Erase All
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set General Purpose NVM bit
Clear General Purpose NVM bit
Get General Purpose NVM bit
Set Security Bit
Get Security Bit
Write Memory
Get Version
Figure 14-2
and
Table
14-4.
87

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