ADSP-21364SBBCZENG AD [Analog Devices], ADSP-21364SBBCZENG Datasheet - Page 17

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ADSP-21364SBBCZENG

Manufacturer Part Number
ADSP-21364SBBCZENG
Description
SHARC Processor
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
Note the definitions of various clock periods that are a function
of CLKIN and the appropriate ratio control
Table 8. ADSP-21364 CLKOUT and CCLK Clock
Generation Operation
Table 9. Clock Periods
1
Figure 5
external oscillator or crystal. Note that more ratios are possible
and can be set through software using the power management
control register (PMCTL). For more information, see the
ADSP-2136x SHARC Processor Programming Reference.
Timing
Requirements
CLKIN
CCLK
Timing
Requirements
t
t
t
t
t
where:
SR = serial port-to-core clock ratio (wide range, determined by
CK
CCLK
PCLK
SCLK
SPICLK
SPORT CLKDIV)
SPIR = SPI-to-Core Clock Ratio (wide range, determined by
SPIBAUD register)
DAI_Px = Serial Port Clock
SPICLK = SPI Clock
CLKIN
XTAL
Figure 5. Core Clock and System Clock Relationship to CLKIN
shows Core to CLKIN ratios of 6:1, 16:1 and 32:1 with
XTAL
OSC
Description
CLKIN Clock Period
(Processor) Core Clock Period
(Peripheral) Clock Period = 2 × t
Serial Port Clock Period = (t
SPI Clock Period = (t
Description
Input Clock
Core Clock
PLLILCLK
1
CLK-CFG [1:0]
6:1, 16:1,
32:1
PLL
PCLK
) × SPIR
(Table
PCLK
Calculation
1/t
1/t
Rev. PrB | Page 17 of 52 | September 2004
CK
CCLK
) × SR
CCLK
8).
CLKOUT
CCLK
(CORE CLOCK)
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results
for an individual device, the values given in this data sheet
reflect statistical variations and worst cases. Consequently, it is
not meaningful to add parameters to derive longer times. See
Figure 38 on page 43
ence levels.
Switching Characteristics specify how the processor changes its
signals. Circuitry external to the processor must be designed for
compatibility with these signal characteristics. Switching char-
acteristics describe what the processor will do in a given
circumstance. Use switching characteristics to ensure that any
timing requirement of a device connected to the processor (such
as memory) is satisfied.
Timing Requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices.
under Test Conditions for voltage refer-
ADSP-21364

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